提交 ed733619 编写于 作者: T Tero Kristo 提交者: Paul Walmsley

ARM: OMAP3: hwmod data: fix iva2 reset info

IVA2 hwmod resets were missing the status bit offsets. Also, as the
hwmod itself didn't have prcm info at all, resetting iva hwmod was
accessing some bogus memory addresses. Added both infos to fix this.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
上级 4cbe5a55
...@@ -67,6 +67,7 @@ ...@@ -67,6 +67,7 @@
#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) #define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
/* CM_IDLEST_IVA2 */ /* CM_IDLEST_IVA2 */
#define OMAP3430_ST_IVA2_SHIFT 0
#define OMAP3430_ST_IVA2_MASK (1 << 0) #define OMAP3430_ST_IVA2_MASK (1 << 0)
/* CM_IDLEST_PLL_IVA2 */ /* CM_IDLEST_PLL_IVA2 */
......
...@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = { ...@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
/* IVA2 (IVA2) */ /* IVA2 (IVA2) */
static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = { static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {
{ .name = "logic", .rst_shift = 0 }, { .name = "logic", .rst_shift = 0, .st_shift = 8 },
{ .name = "seq0", .rst_shift = 1 }, { .name = "seq0", .rst_shift = 1, .st_shift = 9 },
{ .name = "seq1", .rst_shift = 2 }, { .name = "seq1", .rst_shift = 2, .st_shift = 10 },
}; };
static struct omap_hwmod omap3xxx_iva_hwmod = { static struct omap_hwmod omap3xxx_iva_hwmod = {
...@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = { ...@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.rst_lines = omap3xxx_iva_resets, .rst_lines = omap3xxx_iva_resets,
.rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets), .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets),
.main_clk = "iva2_ck", .main_clk = "iva2_ck",
.prcm = {
.omap2 = {
.module_offs = OMAP3430_IVA2_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
}
},
}; };
/* timer class */ /* timer class */
......
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