提交 ed402af3 编写于 作者: L Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (112 commits)
  sh: Move SH-4 CPU headers down one more level.
  sh: Only build in gpio.o when CONFIG_GENERIC_GPIO is selected.
  sh: Migrate common board headers to mach-common/.
  sh: Move the CPU definition headers from asm/ to cpu/.
  serial: sh-sci: Add support SCIF of SH7723
  video: add sh_mobile_lcdc platform flags
  video: remove unused sh_mobile_lcdc platform data
  sh: remove consistent alloc cruft
  sh: add dynamic crash base address support
  sh: reduce Migo-R smc91x overruns
  sh: Fix up some merge damage.
  Fix debugfs_create_file's error checking method for arch/sh/mm/
  Fix debugfs_create_dir's error checking method for arch/sh/kernel/
  sh: ap325rxa: Add support RTC RX-8564LC in AP325RXA board
  sh: Use sh7720 GPIO on magicpanelr2 board
  sh: Add sh7720 pinmux code
  sh: Use sh7203 GPIO on rsk7203 board
  sh: Add sh7203 pinmux code
  sh: Use sh7723 GPIO on AP325RXA board
  sh: Add sh7723 pinmux code
  ...
......@@ -796,6 +796,8 @@ and is between 256 and 4096 characters. It is defined in the file
Defaults to the default architecture's huge page size
if not specified.
hlt [BUGS=ARM,SH]
i8042.debug [HW] Toggle i8042 debug mode
i8042.direct [HW] Put keyboard port into non-translated mode
i8042.dumbkbd [HW] Pretend that controller can only read data from
......@@ -1211,6 +1213,10 @@ and is between 256 and 4096 characters. It is defined in the file
mem=nopentium [BUGS=X86-32] Disable usage of 4MB pages for kernel
memory.
memchunk=nn[KMG]
[KNL,SH] Allow user to override the default size for
per-device physically contiguous DMA buffers.
memmap=exactmap [KNL,X86-32,X86_64] Enable setting of an exact
E820 memory map, as specified by the user.
Such memmap=exactmap lines can be constructed based on
......@@ -1393,6 +1399,8 @@ and is between 256 and 4096 characters. It is defined in the file
nodisconnect [HW,SCSI,M68K] Disables SCSI disconnects.
nodsp [SH] Disable hardware DSP at boot time.
noefi [X86-32,X86-64] Disable EFI runtime services support.
noexec [IA-64]
......@@ -1409,13 +1417,15 @@ and is between 256 and 4096 characters. It is defined in the file
noexec32=off: disable non-executable mappings
read implies executable mappings
nofpu [SH] Disable hardware FPU at boot time.
nofxsr [BUGS=X86-32] Disables x86 floating point extended
register save and restore. The kernel will only save
legacy floating-point registers on task switch.
noclflush [BUGS=X86] Don't use the CLFLUSH instruction
nohlt [BUGS=ARM]
nohlt [BUGS=ARM,SH]
no-hlt [BUGS=X86-32] Tells the kernel that the hlt
instruction doesn't work correctly and not to
......
......@@ -12,6 +12,7 @@ config SUPERH
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_GENERIC_DMA_COHERENT
select HAVE_IOREMAP_PROT if MMU
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
......@@ -20,6 +21,10 @@ config SUPERH
config SUPERH32
def_bool !SUPERH64
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_ARCH_TRACEHOOK
select HAVE_FTRACE
config SUPERH64
def_bool y if CPU_SH5
......@@ -54,8 +59,11 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
config GENERIC_IRQ_PROBE
def_bool y
config GENERIC_GPIO
def_bool n
config GENERIC_CALIBRATE_DELAY
def_bool y
bool
config GENERIC_IOMAP
bool
......@@ -66,6 +74,9 @@ config GENERIC_TIME
config GENERIC_CLOCKEVENTS
def_bool n
config GENERIC_CLOCKEVENTS_BROADCAST
bool
config GENERIC_LOCKBREAK
def_bool y
depends on SMP && PREEMPT
......@@ -92,6 +103,10 @@ config STACKTRACE_SUPPORT
config LOCKDEP_SUPPORT
def_bool y
config HAVE_LATENCYTOP_SUPPORT
def_bool y
depends on !SMP
config ARCH_HAS_ILOG2_U32
def_bool n
......@@ -325,6 +340,7 @@ config CPU_SUBTYPE_SHX3
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
select SYS_SUPPORTS_SMP
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
# SH4AL-DSP Processor Support
......@@ -492,7 +508,6 @@ config CRASH_DUMP
config SECCOMP
bool "Enable seccomp to safely compute untrusted bytecode"
depends on PROC_FS
default y
help
This kernel feature is useful for number crunching applications
that may need to compute untrusted bytecode during their
......
......@@ -82,7 +82,7 @@ config DEBUG_STACK_USAGE
config 4KSTACKS
bool "Use 4Kb for kernel stacks instead of 8Kb"
depends on DEBUG_KERNEL && (MMU || BROKEN)
depends on DEBUG_KERNEL && (MMU || BROKEN) && !PAGE_SIZE_64KB
help
If you say Y here the kernel will use a 4Kb stacksize for the
kernel stack attached to each process/thread. This facilitates
......
......@@ -76,8 +76,10 @@ KBUILD_IMAGE := $(defaultimage-y)
# error messages during linking.
#
ifdef CONFIG_SUPERH32
UTS_MACHINE := sh
LDFLAGS_vmlinux += -e _stext
else
UTS_MACHINE := sh64
LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
--defsym phys_stext_shmedia=phys_stext+1 \
-e phys_stext_shmedia
......@@ -123,6 +125,9 @@ core-y += $(addprefix arch/sh/boards/, \
$(filter-out ., $(patsubst %,%/,$(machdir-y))))
endif
# Common machine type headers. Not part of the arch/sh/boards/ hierarchy.
machdir-y += mach-common
# Companion chips
core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
......
......@@ -128,6 +128,7 @@ config SH_RTS7751R2D
config SH_RSK7203
bool "RSK7203"
select GENERIC_GPIO
depends on CPU_SUBTYPE_SH7203
config SH_SDK7780
......@@ -162,6 +163,7 @@ config SH_SH7785LCR_29BIT_PHYSMAPS
config SH_MIGOR
bool "Migo-R"
depends on CPU_SUBTYPE_SH7722
select GENERIC_GPIO
help
Select Migo-R if configuring for the SH7722 Migo-R platform
by Renesas System Solutions Asia Pte. Ltd.
......@@ -169,6 +171,7 @@ config SH_MIGOR
config SH_AP325RXA
bool "AP-325RXA"
depends on CPU_SUBTYPE_SH7723
select GENERIC_GPIO
help
Renesas "AP-325RXA" support.
Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
......@@ -184,6 +187,13 @@ config SH_EDOSK7705
bool "EDOSK7705"
depends on CPU_SUBTYPE_SH7705
config SH_EDOSK7760
bool "EDOSK7760"
depends on CPU_SUBTYPE_SH7760
help
Select if configuring for a Renesas EDOSK7760
evaluation board.
config SH_SH4202_MICRODEV
bool "SH4-202 MicroDev"
depends on CPU_SUBTYPE_SH4_202
......@@ -228,6 +238,7 @@ config SH_X3PROTO
config SH_MAGIC_PANEL_R2
bool "Magic Panel R2"
depends on CPU_SUBTYPE_SH7720
select GENERIC_GPIO
help
Select Magic Panel R2 if configuring for Magic Panel R2.
......
......@@ -6,3 +6,4 @@ obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
obj-$(CONFIG_SH_RSK7203) += board-rsk7203.o
obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
obj-$(CONFIG_SH_SHMIN) += board-shmin.o
obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
......@@ -18,11 +18,13 @@
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/smc911x.h>
#include <linux/gpio.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <asm/sh_mobile_lcdc.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/io.h>
#include <asm/clock.h>
#include <cpu/sh7723.h>
static struct smc911x_platdata smc911x_info = {
.flags = SMC911X_USE_32BIT,
......@@ -52,20 +54,33 @@ static struct platform_device smc9118_device = {
},
};
/*
* AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
* If this area erased, this board can not boot.
*/
static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
{
.name = "uboot",
.offset = 0,
.size = (1 * 1024 * 1024),
.mask_flags = MTD_WRITEABLE, /* Read-only */
.name = "uboot",
.offset = 0,
.size = (1 * 1024 * 1024),
.mask_flags = MTD_WRITEABLE, /* Read-only */
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (2 * 1024 * 1024),
}, {
.name = "free-area0",
.offset = MTDPART_OFS_APPEND,
.size = ((7 * 1024 * 1024) + (512 * 1024)),
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (2 * 1024 * 1024),
.name = "CPLD-Data",
.offset = MTDPART_OFS_APPEND,
.mask_flags = MTD_WRITEABLE, /* Read-only */
.size = (1024 * 128 * 2),
}, {
.name = "other",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
.name = "free-area1",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
......@@ -96,17 +111,7 @@ static struct platform_device ap325rxa_nor_flash_device = {
#define FPGA_LCDREG 0xB4100180
#define FPGA_BKLREG 0xB4100212
#define FPGA_LCDREG_VAL 0x0018
#define PORT_PHCR 0xA405010E
#define PORT_PLCR 0xA4050114
#define PORT_PMCR 0xA4050116
#define PORT_PRCR 0xA405011C
#define PORT_PSCR 0xA405011E
#define PORT_PZCR 0xA405014C
#define PORT_HIZCRA 0xA4050158
#define PORT_MSELCRB 0xA4050182
#define PORT_PSDR 0xA405013E
#define PORT_PZDR 0xA405016C
#define PORT_PSELD 0xA4050154
static void ap320_wvga_power_on(void *board_data)
{
......@@ -116,8 +121,7 @@ static void ap320_wvga_power_on(void *board_data)
ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
/* backlight */
ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
gpio_set_value(GPIO_PTS3, 0);
ctrl_outw(0x100, FPGA_BKLREG);
}
......@@ -281,12 +285,84 @@ static struct platform_device *ap325rxa_devices[] __initdata = {
};
static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
{
I2C_BOARD_INFO("pcf8563", 0x51),
},
};
static int __init ap325rxa_devices_setup(void)
{
clk_always_enable("mstp200"); /* LCDC */
clk_always_enable("mstp203"); /* CEU */
/* LD3 and LD4 LEDs */
gpio_request(GPIO_PTX5, NULL); /* RUN */
gpio_direction_output(GPIO_PTX5, 1);
gpio_export(GPIO_PTX5, 0);
gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
gpio_direction_output(GPIO_PTX4, 0);
gpio_export(GPIO_PTX4, 0);
/* SW1 input */
gpio_request(GPIO_PTF7, NULL); /* MODE */
gpio_direction_input(GPIO_PTF7);
gpio_export(GPIO_PTF7, 0);
/* LCDC */
clk_always_enable("mstp200");
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request(GPIO_FN_LCDVEPWC, NULL);
gpio_request(GPIO_FN_LCDVCPWC, NULL);
gpio_request(GPIO_FN_LCDVSYN, NULL);
gpio_request(GPIO_FN_LCDHSYN, NULL);
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDDON, NULL);
/* LCD backlight */
gpio_request(GPIO_PTS3, NULL);
gpio_direction_output(GPIO_PTS3, 1);
/* CEU */
clk_always_enable("mstp203");
gpio_request(GPIO_FN_VIO_CLK2, NULL);
gpio_request(GPIO_FN_VIO_VD2, NULL);
gpio_request(GPIO_FN_VIO_HD2, NULL);
gpio_request(GPIO_FN_VIO_FLD, NULL);
gpio_request(GPIO_FN_VIO_CKO, NULL);
gpio_request(GPIO_FN_VIO_D15, NULL);
gpio_request(GPIO_FN_VIO_D14, NULL);
gpio_request(GPIO_FN_VIO_D13, NULL);
gpio_request(GPIO_FN_VIO_D12, NULL);
gpio_request(GPIO_FN_VIO_D11, NULL);
gpio_request(GPIO_FN_VIO_D10, NULL);
gpio_request(GPIO_FN_VIO_D9, NULL);
gpio_request(GPIO_FN_VIO_D8, NULL);
gpio_request(GPIO_PTZ7, NULL);
gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
gpio_request(GPIO_PTZ6, NULL);
gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
gpio_request(GPIO_PTZ5, NULL);
gpio_direction_output(GPIO_PTZ5, 1); /* RST_CAM */
gpio_request(GPIO_PTZ4, NULL);
gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
......@@ -300,18 +376,6 @@ device_initcall(ap325rxa_devices_setup);
static void __init ap325rxa_setup(char **cmdline_p)
{
/* LCDC configuration */
ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
/* CEU */
ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
}
static struct sh_machine_vector mv_ap325rxa __initmv = {
......
/*
* Renesas Europe EDOSK7760 Board Support
*
* Copyright (C) 2008 SPES Societa' Progettazione Elettronica e Software Ltd.
* Author: Luca Santini <luca.santini@spesonline.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/smc91x.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/mtd/physmap.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/delay.h>
#include <asm/i2c-sh7760.h>
#include <asm/sizes.h>
/* Bus state controller registers for CS4 area */
#define BSC_CS4BCR 0xA4FD0010
#define BSC_CS4WCR 0xA4FD0030
#define SMC_IOBASE 0xA2000000
#define SMC_IO_OFFSET 0x300
#define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
#define ETHERNET_IRQ 5
/* NOR flash */
static struct mtd_partition edosk7760_nor_flash_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_256K,
.mask_flags = MTD_WRITEABLE, /* Read-only */
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_2M,
}, {
.name = "fs",
.offset = MTDPART_OFS_APPEND,
.size = SZ_26M,
}, {
.name = "other",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data edosk7760_nor_flash_data = {
.width = 4,
.parts = edosk7760_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(edosk7760_nor_flash_partitions),
};
static struct resource edosk7760_nor_flash_resources[] = {
[0] = {
.name = "NOR Flash",
.start = 0x00000000,
.end = 0x00000000 + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device edosk7760_nor_flash_device = {
.name = "physmap-flash",
.resource = edosk7760_nor_flash_resources,
.num_resources = ARRAY_SIZE(edosk7760_nor_flash_resources),
.dev = {
.platform_data = &edosk7760_nor_flash_data,
},
};
/* i2c initialization functions */
static struct sh7760_i2c_platdata i2c_pd = {
.speed_khz = 400,
};
static struct resource sh7760_i2c1_res[] = {
{
.start = SH7760_I2C1_MMIO,
.end = SH7760_I2C1_MMIOEND,
.flags = IORESOURCE_MEM,
},{
.start = SH7760_I2C1_IRQ,
.end = SH7760_I2C1_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sh7760_i2c1_dev = {
.dev = {
.platform_data = &i2c_pd,
},
.name = SH7760_I2C_DEVNAME,
.id = 1,
.resource = sh7760_i2c1_res,
.num_resources = ARRAY_SIZE(sh7760_i2c1_res),
};
static struct resource sh7760_i2c0_res[] = {
{
.start = SH7760_I2C0_MMIO,
.end = SH7760_I2C0_MMIOEND,
.flags = IORESOURCE_MEM,
}, {
.start = SH7760_I2C0_IRQ,
.end = SH7760_I2C0_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sh7760_i2c0_dev = {
.dev = {
.platform_data = &i2c_pd,
},
.name = SH7760_I2C_DEVNAME,
.id = 0,
.resource = sh7760_i2c0_res,
.num_resources = ARRAY_SIZE(sh7760_i2c0_res),
};
/* eth initialization functions */
static struct smc91x_platdata smc91x_info = {
.flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL,
};
static struct resource smc91x_res[] = {
[0] = {
.start = SMC_IOADDR,
.end = SMC_IOADDR + SZ_32 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ETHERNET_IRQ,
.end = ETHERNET_IRQ,
.flags = IORESOURCE_IRQ ,
}
};
static struct platform_device smc91x_dev = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(smc91x_res),
.resource = smc91x_res,
.dev = {
.platform_data = &smc91x_info,
},
};
/* platform init code */
static struct platform_device *edosk7760_devices[] __initdata = {
&smc91x_dev,
&edosk7760_nor_flash_device,
&sh7760_i2c0_dev,
&sh7760_i2c1_dev,
};
static int __init init_edosk7760_devices(void)
{
plat_irq_setup_pins(IRQ_MODE_IRQ);
return platform_add_devices(edosk7760_devices,
ARRAY_SIZE(edosk7760_devices));
}
__initcall(init_edosk7760_devices);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_edosk7760 __initmv = {
.mv_name = "EDOSK7760",
.mv_nr_irqs = 128,
};
......@@ -13,12 +13,14 @@
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/map.h>
#include <asm/magicpanelr2.h>
#include <mach/magicpanelr2.h>
#include <asm/heartbeat.h>
#include <cpu/sh7720.h>
#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL)
......@@ -170,7 +172,14 @@ static void __init setup_port_multiplexing(void)
/* R7 A25; R6 A24; R5 A23; R4 A22;
* R3 A21; R2 A20; R1 A19; R0 A0;
*/
ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */
gpio_request(GPIO_FN_A25, NULL);
gpio_request(GPIO_FN_A24, NULL);
gpio_request(GPIO_FN_A23, NULL);
gpio_request(GPIO_FN_A22, NULL);
gpio_request(GPIO_FN_A21, NULL);
gpio_request(GPIO_FN_A20, NULL);
gpio_request(GPIO_FN_A19, NULL);
gpio_request(GPIO_FN_A0, NULL);
/* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
* S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
......
......@@ -16,8 +16,10 @@
#include <linux/mtd/physmap.h>
#include <linux/mtd/map.h>
#include <linux/smc911x.h>
#include <linux/gpio.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh7203.h>
static struct smc911x_platdata smc911x_info = {
.flags = SMC911X_USE_16BIT,
......@@ -122,6 +124,15 @@ static struct platform_device *rsk7203_devices[] __initdata = {
static int __init rsk7203_devices_setup(void)
{
/* Select pins for SCIF0 */
gpio_request(GPIO_FN_TXD0, NULL);
gpio_request(GPIO_FN_RXD0, NULL);
/* Lit LED0 */
gpio_request(GPIO_PE10, NULL);
gpio_direction_output(GPIO_PE10, 0);
gpio_export(GPIO_PE10, 0);
set_mtd_partitions();
return platform_add_devices(rsk7203_devices,
ARRAY_SIZE(rsk7203_devices));
......
......@@ -19,7 +19,7 @@
#include <linux/i2c-pca-platform.h>
#include <linux/i2c-algo-pca.h>
#include <asm/heartbeat.h>
#include <asm/sh7785lcr.h>
#include <mach/sh7785lcr.h>
/*
* NOTE: This board has 2 physical memory maps.
......
......@@ -8,7 +8,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/machvec.h>
#include <asm/shmin.h>
#include <mach/shmin.h>
#include <asm/clock.h>
#include <asm/io.h>
......
......@@ -11,7 +11,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/edosk7705/io.h>
#include <mach/edosk7705.h>
#include <asm/addrspace.h>
#define SMC_IOADDR 0xA2000000
......
......@@ -10,7 +10,7 @@
*/
#include <linux/init.h>
#include <asm/machvec.h>
#include <asm/edosk7705/io.h>
#include <mach/edosk7705.h>
static void __init sh_edosk7705_init_irq(void)
{
......
......@@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#include <mach/highlander.h>
enum {
UNUSED = 0,
......
......@@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#include <mach/highlander.h>
enum {
UNUSED = 0,
......
......@@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#include <mach/highlander.h>
enum {
UNUSED = 0,
......
......@@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/r7780rp.h>
#include <mach/highlander.h>
#include <asm/push-switch.h>
static irqreturn_t psw_irq_handler(int irq, void *arg)
......
......@@ -20,7 +20,7 @@
#include <linux/i2c.h>
#include <net/ax88796.h>
#include <asm/machvec.h>
#include <asm/r7780rp.h>
#include <mach/highlander.h>
#include <asm/clock.h>
#include <asm/heartbeat.h>
#include <asm/io.h>
......
......@@ -14,7 +14,7 @@
#include <linux/apm-emulation.h>
#include <linux/io.h>
#include <asm/adc.h>
#include <asm/hp6xx.h>
#include <mach/hp6xx.h>
/* percentage values */
#define APM_CRITICAL 10
......
......@@ -12,7 +12,7 @@
#include <linux/time.h>
#include <asm/io.h>
#include <asm/hd64461.h>
#include <asm/hp6xx.h>
#include <mach/hp6xx.h>
#include <cpu/dac.h>
#include <asm/pm.h>
......
......@@ -15,7 +15,7 @@
#include <asm/hd64461.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hp6xx.h>
#include <mach/hp6xx.h>
#include <cpu/dac.h>
#define SCPCR 0xa4000116
......
......@@ -15,7 +15,7 @@
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/lboxre2.h>
#include <mach/lboxre2.h>
/*
* Initialize IRQ setting
......
......@@ -16,7 +16,7 @@
#include <linux/ata_platform.h>
#include <asm/machvec.h>
#include <asm/addrspace.h>
#include <asm/lboxre2.h>
#include <mach/lboxre2.h>
#include <asm/io.h>
static struct resource cf_ide_resources[] = {
......
......@@ -15,7 +15,7 @@
#include <linux/pci.h>
#include <linux/wait.h>
#include <asm/io.h>
#include <asm/microdev.h>
#include <mach/microdev.h>
/*
* we need to have a 'safe' address to re-direct all I/O requests
......
......@@ -14,7 +14,7 @@
#include <linux/interrupt.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/microdev.h>
#include <mach/microdev.h>
#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
......
......@@ -14,7 +14,7 @@
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <video/s1d13xxxfb.h>
#include <asm/microdev.h>
#include <mach/microdev.h>
#include <asm/io.h>
#include <asm/machvec.h>
......
......@@ -17,8 +17,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/migor.h>
#include <linux/gpio.h>
#include <video/sh_mobile_lcdc.h>
#include <cpu/sh7722.h>
#include <mach/migor.h>
/* LCD Module is a PH240320T according to board schematics. This module
* is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?)
......@@ -30,9 +32,9 @@
static void reset_lcd_module(void)
{
ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR);
gpio_set_value(GPIO_PTH2, 0);
mdelay(2);
ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR);
gpio_set_value(GPIO_PTH2, 1);
mdelay(1);
}
......
......@@ -17,14 +17,16 @@
#include <linux/smc91x.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/clock.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/migor.h>
#include <mach/migor.h>
#include <cpu/sh7722.h>
/* Address IRQ Size Bus Description
* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
......@@ -35,7 +37,7 @@
*/
static struct smc91x_platdata smc91x_info = {
.flags = SMC91X_USE_16BIT,
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
};
static struct resource smc91x_eth_resources[] = {
......@@ -169,7 +171,7 @@ static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
static int migor_nand_flash_ready(struct mtd_info *mtd)
{
return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
}
struct platform_nand_data migor_nand_flash_data = {
......@@ -286,22 +288,15 @@ static struct clk *camera_clk;
static void camera_power_on(void)
{
unsigned char value;
camera_clk = clk_get(NULL, "video_clk");
clk_set_rate(camera_clk, 24000000);
clk_enable(camera_clk); /* start VIO_CKO */
/* use VIO_RST to take camera out of reset */
mdelay(10);
value = ctrl_inb(PORT_PTDR);
value &= ~0x09;
#ifndef CONFIG_SH_MIGOR_RTA_WVGA
value |= 0x01;
#endif
ctrl_outb(value, PORT_PTDR);
gpio_set_value(GPIO_PTT3, 0);
mdelay(10);
ctrl_outb(value | 8, PORT_PTDR);
gpio_set_value(GPIO_PTT3, 1);
}
static void camera_power_off(void)
......@@ -309,7 +304,7 @@ static void camera_power_off(void)
clk_disable(camera_clk); /* stop VIO_CKO */
clk_put(camera_clk);
ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR);
gpio_set_value(GPIO_PTT3, 0);
}
#ifdef CONFIG_I2C
......@@ -458,75 +453,135 @@ static struct i2c_board_info migor_i2c_devices[] = {
static int __init migor_devices_setup(void)
{
/* Lit D11 LED */
gpio_request(GPIO_PTJ7, NULL);
gpio_direction_output(GPIO_PTJ7, 1);
gpio_export(GPIO_PTJ7, 0);
/* Lit D12 LED */
gpio_request(GPIO_PTJ5, NULL);
gpio_direction_output(GPIO_PTJ5, 1);
gpio_export(GPIO_PTJ5, 0);
/* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
gpio_request(GPIO_FN_IRQ0, NULL);
ctrl_outl(0x00003400, BSC_CS4BCR);
ctrl_outl(0x00110080, BSC_CS4WCR);
/* KEYSC */
clk_always_enable("mstp214"); /* KEYSC */
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
gpio_request(GPIO_FN_KEYIN1, NULL);
gpio_request(GPIO_FN_KEYIN2, NULL);
gpio_request(GPIO_FN_KEYIN3, NULL);
gpio_request(GPIO_FN_KEYIN4, NULL);
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
/* NAND Flash */
gpio_request(GPIO_FN_CS6A_CE2B, NULL);
ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
gpio_request(GPIO_PTA1, NULL);
gpio_direction_input(GPIO_PTA1);
/* Touch Panel */
gpio_request(GPIO_FN_IRQ6, NULL);
/* LCD Panel */
clk_always_enable("mstp200"); /* LCDC */
#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
gpio_request(GPIO_FN_LCDD17, NULL);
gpio_request(GPIO_FN_LCDD16, NULL);
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDRS, NULL);
gpio_request(GPIO_FN_LCDCS, NULL);
gpio_request(GPIO_FN_LCDRD, NULL);
gpio_request(GPIO_FN_LCDWR, NULL);
gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
gpio_direction_output(GPIO_PTH2, 1);
#endif
#ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDLCLK, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request(GPIO_FN_LCDVEPWC, NULL);
gpio_request(GPIO_FN_LCDVCPWC, NULL);
gpio_request(GPIO_FN_LCDVSYN, NULL);
gpio_request(GPIO_FN_LCDHSYN, NULL);
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDDON, NULL);
#endif
/* CEU */
clk_always_enable("mstp203"); /* CEU */
gpio_request(GPIO_FN_VIO_CLK2, NULL);
gpio_request(GPIO_FN_VIO_VD2, NULL);
gpio_request(GPIO_FN_VIO_HD2, NULL);
gpio_request(GPIO_FN_VIO_FLD, NULL);
gpio_request(GPIO_FN_VIO_CKO, NULL);
gpio_request(GPIO_FN_VIO_D15, NULL);
gpio_request(GPIO_FN_VIO_D14, NULL);
gpio_request(GPIO_FN_VIO_D13, NULL);
gpio_request(GPIO_FN_VIO_D12, NULL);
gpio_request(GPIO_FN_VIO_D11, NULL);
gpio_request(GPIO_FN_VIO_D10, NULL);
gpio_request(GPIO_FN_VIO_D9, NULL);
gpio_request(GPIO_FN_VIO_D8, NULL);
gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
gpio_direction_output(GPIO_PTT3, 0);
gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
gpio_direction_output(GPIO_PTT2, 1);
gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
gpio_direction_output(GPIO_PTT0, 0);
#else
gpio_direction_output(GPIO_PTT0, 1);
#endif
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
i2c_register_board_info(0, migor_i2c_devices,
ARRAY_SIZE(migor_i2c_devices));
return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
}
__initcall(migor_devices_setup);
static void __init migor_setup(char **cmdline_p)
{
/* SMC91C111 - Enable IRQ0 */
ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);
/* KEYSC */
ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
/* NAND Flash */
ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
BSC_CS6ABCR);
/* Touch Panel - Enable IRQ6 */
ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
/* LCDC - WVGA - Enable RGB Interface signals */
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
ctrl_outw(0x0000, PORT_PHCR);
ctrl_outw(0x0000, PORT_PLCR);
ctrl_outw(0x0000, PORT_PMCR);
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD);
ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
/* LCDC - QVGA - Enable SYS Interface signals */
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR);
ctrl_outw(0x0000, PORT_PLCR);
ctrl_outw(0x0000, PORT_PMCR);
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD);
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
#endif
/* CEU */
ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR);
ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR);
ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR);
ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR);
ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC);
ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD);
ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE);
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA);
ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB);
}
static struct sh_machine_vector mv_migor __initmv = {
......
......@@ -13,7 +13,7 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include <mach/r2d.h>
#define R2D_NR_IRL 13
......
......@@ -18,7 +18,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <asm/machvec.h>
#include <asm/rts7751r2d.h>
#include <mach/r2d.h>
#include <asm/io.h>
#include <asm/io_trapped.h>
#include <asm/spi.h>
......
......@@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/sdk7780.h>
#include <mach/sdk7780.h>
enum {
UNUSED = 0,
......
......@@ -13,7 +13,7 @@
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <asm/machvec.h>
#include <asm/sdk7780.h>
#include <mach/sdk7780.h>
#include <asm/heartbeat.h>
#include <asm/io.h>
#include <asm/addrspace.h>
......
......@@ -15,7 +15,7 @@
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sh7763rdp.h>
#include <mach/sh7763rdp.h>
#define INTC_BASE (0xFFD00000)
#define INTC_INT2PRI7 (INTC_BASE+0x4001C)
......
......@@ -17,7 +17,7 @@
#include <linux/mtd/physmap.h>
#include <linux/fb.h>
#include <linux/io.h>
#include <asm/sh7763rdp.h>
#include <mach/sh7763rdp.h>
#include <asm/sh_eth.h>
#include <asm/sh7760fb.h>
......
......@@ -19,7 +19,7 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <asm/machvec.h>
#include <asm/snapgear.h>
#include <mach/snapgear.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <cpu/timer.h>
......
......@@ -9,7 +9,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/systemh7751.h>
#include <mach/systemh7751.h>
#include <asm/addrspace.h>
#include <asm/io.h>
......
......@@ -14,7 +14,7 @@
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/systemh7751.h>
#include <mach/systemh7751.h>
#include <asm/smc37c93x.h>
/* address of external interrupt mask register
......
......@@ -16,7 +16,7 @@
*/
#include <linux/init.h>
#include <asm/machvec.h>
#include <asm/systemh7751.h>
#include <mach/systemh7751.h>
extern void make_systemh_irq(unsigned int irq);
......
......@@ -4,7 +4,7 @@
#include <linux/pci.h>
#include <asm/machvec.h>
#include <asm/addrspace.h>
#include <asm/titan.h>
#include <mach/titan.h>
#include <asm/io.h>
static inline unsigned int port2adr(unsigned int port)
......
......@@ -9,7 +9,7 @@
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/titan.h>
#include <mach/titan.h>
#include <asm/io.h>
static void __init init_titan_irq(void)
......
zImage
vmlinux.srec
uImage
uImage.srec
......@@ -33,10 +33,16 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
$(obj)/compressed/vmlinux: FORCE
$(Q)$(MAKE) $(build)=$(obj)/compressed $@
ifeq ($(CONFIG_32BIT),y)
KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_ZERO_PAGE_OFFSET)]')
else
KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \
$(CONFIG_ZERO_PAGE_OFFSET)]')
endif
KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
......
......@@ -23,6 +23,11 @@ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
ifeq ($(CONFIG_FTRACE),y)
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
......
......@@ -191,7 +191,7 @@ long* stack_start = &user_stack[STACK_SIZE];
void decompress_kernel(void)
{
output_data = 0;
output_data = NULL;
output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
#ifdef CONFIG_29BIT
output_ptr |= P2SEG;
......
此差异已折叠。
此差异已折叠。
......@@ -10,7 +10,7 @@
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <asm/lboxre2.h>
#include <mach/lboxre2.h>
#include "pci-sh4.h"
static char lboxre2_irq_tab[] __initdata = {
......
......@@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/r7780rp.h>
#include <mach/highlander.h>
#include <asm/io.h>
#include "pci-sh4.h"
......
......@@ -15,7 +15,7 @@
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include <mach/r2d.h>
#include "pci-sh4.h"
static u8 rts7751r2d_irq_tab[] __initdata = {
......
......@@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/sdk7780.h>
#include <mach/sdk7780.h>
#include <asm/io.h>
#include "pci-sh4.h"
......
......@@ -16,7 +16,7 @@
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <asm/titan.h>
#include <mach/titan.h>
#include "pci-sh4.h"
static char titan_irq_tab[] __initdata = {
......
#ifndef __ASM_SH_BITOPS_LLSC_H
#define __ASM_SH_BITOPS_LLSC_H
static inline void set_bit(int nr, volatile void * addr)
{
int mask;
volatile unsigned int *a = addr;
unsigned long tmp;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! set_bit \n\t"
"or %3, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
: "=&z" (tmp), "=r" (a)
: "1" (a), "r" (mask)
: "t", "memory"
);
}
static inline void clear_bit(int nr, volatile void * addr)
{
int mask;
volatile unsigned int *a = addr;
unsigned long tmp;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! clear_bit \n\t"
"and %3, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
: "=&z" (tmp), "=r" (a)
: "1" (a), "r" (~mask)
: "t", "memory"
);
}
static inline void change_bit(int nr, volatile void * addr)
{
int mask;
volatile unsigned int *a = addr;
unsigned long tmp;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! change_bit \n\t"
"xor %3, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
: "=&z" (tmp), "=r" (a)
: "1" (a), "r" (mask)
: "t", "memory"
);
}
static inline int test_and_set_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile unsigned int *a = addr;
unsigned long tmp;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! test_and_set_bit \n\t"
"mov %0, %2 \n\t"
"or %4, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
"and %4, %2 \n\t"
: "=&z" (tmp), "=r" (a), "=&r" (retval)
: "1" (a), "r" (mask)
: "t", "memory"
);
return retval != 0;
}
static inline int test_and_clear_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile unsigned int *a = addr;
unsigned long tmp;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! test_and_clear_bit \n\t"
"mov %0, %2 \n\t"
"and %5, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
"and %4, %2 \n\t"
"synco \n\t"
: "=&z" (tmp), "=r" (a), "=&r" (retval)
: "1" (a), "r" (mask), "r" (~mask)
: "t", "memory"
);
return retval != 0;
}
static inline int test_and_change_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile unsigned int *a = addr;
unsigned long tmp;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! test_and_change_bit \n\t"
"mov %0, %2 \n\t"
"xor %4, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
"and %4, %2 \n\t"
"synco \n\t"
: "=&z" (tmp), "=r" (a), "=&r" (retval)
: "1" (a), "r" (mask)
: "t", "memory"
);
return retval != 0;
}
#endif /* __ASM_SH_BITOPS_LLSC_H */
......@@ -13,6 +13,8 @@
#ifdef CONFIG_GUSA_RB
#include <asm/bitops-grb.h>
#elif defined(CONFIG_CPU_SH4A)
#include <asm/bitops-llsc.h>
#else
#include <asm/bitops-irq.h>
#endif
......
......@@ -39,6 +39,7 @@ struct clk {
/* Should be defined by processor-specific code */
void arch_init_clk_ops(struct clk_ops **, int type);
int __init arch_clk_init(void);
/* arch/sh/kernel/cpu/clock.c */
int clk_init(void);
......
#ifndef __ASM_SH_CMPXCHG_LLSC_H
#define __ASM_SH_CMPXCHG_LLSC_H
static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
{
unsigned long retval;
unsigned long tmp;
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! xchg_u32 \n\t"
"mov %0, %2 \n\t"
"mov %4, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
"synco \n\t"
: "=&z"(tmp), "=r" (m), "=&r" (retval)
: "1" (m), "r" (val)
: "t", "memory"
);
return retval;
}
static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
{
unsigned long retval;
unsigned long tmp;
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! xchg_u8 \n\t"
"mov %0, %2 \n\t"
"mov %4, %0 \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
"synco \n\t"
: "=&z"(tmp), "=r" (m), "=&r" (retval)
: "1" (m), "r" (val & 0xff)
: "t", "memory"
);
return retval;
}
static inline unsigned long
__cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
{
unsigned long retval;
unsigned long tmp;
__asm__ __volatile__ (
"1: \n\t"
"movli.l @%1, %0 ! __cmpxchg_u32 \n\t"
"mov %0, %2 \n\t"
"cmp/eq %2, %4 \n\t"
"bf 2f \n\t"
"mov %5, %0 \n\t"
"2: \n\t"
"movco.l %0, @%1 \n\t"
"bf 1b \n\t"
"synco \n\t"
: "=&z" (tmp), "=r" (m), "=&r" (retval)
: "1" (m), "r" (old), "r" (new)
: "t", "memory"
);
return retval;
}
#endif /* __ASM_SH_CMPXCHG_LLSC_H */
......@@ -108,6 +108,14 @@ typedef struct user_fpu_struct elf_fpregset_t;
#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC)
#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC)
#ifdef CONFIG_SUPERH32
/*
* Enable dump using regset.
* This covers all of general/DSP/FPU regs.
*/
#define CORE_DUMP_USE_REGSET
#endif
#define USE_ELF_CORE_DUMP
#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC
#define ELF_EXEC_PAGESIZE PAGE_SIZE
......@@ -190,12 +198,6 @@ do { \
#endif
#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
struct task_struct;
extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
#ifdef CONFIG_VSYSCALL
/* vDSO has arch_setup_additional_pages */
......
......@@ -30,8 +30,15 @@ static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
}
#endif
struct user_regset;
extern int do_fpu_inst(unsigned short, struct pt_regs *);
extern int fpregs_get(struct task_struct *target,
const struct user_regset *regset,
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf);
static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs)
{
preempt_disable();
......@@ -50,6 +57,18 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)
preempt_enable();
}
static inline int init_fpu(struct task_struct *tsk)
{
if (tsk_used_math(tsk)) {
if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
unlazy_fpu(tsk, task_pt_regs(tsk));
return 0;
}
set_stopped_child_used_math(tsk);
return 0;
}
#endif /* __ASSEMBLY__ */
#endif /* __ASM_SH_FPU_H */
#ifndef __ASM_SH_FTRACE_H
#define __ASM_SH_FTRACE_H
#ifndef __ASSEMBLY__
extern void mcount(void);
#endif
#endif /* __ASM_SH_FTRACE_H */
/*
* include/asm-sh/gpio.h
*
* Copyright (C) 2007 Markus Brunner, Mark Jonas
* Generic GPIO API and pinmux table support for SuperH.
*
* Addresses for the Pin Function Controller
* Copyright (c) 2008 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
......@@ -16,4 +16,92 @@
#include <cpu/gpio.h>
#endif
typedef unsigned short pinmux_enum_t;
typedef unsigned char pinmux_flag_t;
#define PINMUX_TYPE_NONE 0
#define PINMUX_TYPE_FUNCTION 1
#define PINMUX_TYPE_GPIO 2
#define PINMUX_TYPE_OUTPUT 3
#define PINMUX_TYPE_INPUT 4
#define PINMUX_TYPE_INPUT_PULLUP 5
#define PINMUX_TYPE_INPUT_PULLDOWN 6
#define PINMUX_FLAG_TYPE (0x7)
#define PINMUX_FLAG_WANT_PULLUP (1 << 3)
#define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
struct pinmux_gpio {
pinmux_enum_t enum_id;
pinmux_flag_t flags;
};
#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
struct pinmux_cfg_reg {
unsigned long reg, reg_width, field_width;
unsigned long *cnt;
pinmux_enum_t *enum_ids;
};
#define PINMUX_CFG_REG(name, r, r_width, f_width) \
.reg = r, .reg_width = r_width, .field_width = f_width, \
.cnt = (unsigned long [r_width / f_width]) {}, \
.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
struct pinmux_data_reg {
unsigned long reg, reg_width;
pinmux_enum_t *enum_ids;
};
#define PINMUX_DATA_REG(name, r, r_width) \
.reg = r, .reg_width = r_width, \
.enum_ids = (pinmux_enum_t [r_width]) \
struct pinmux_range {
pinmux_enum_t begin;
pinmux_enum_t end;
};
struct pinmux_info {
char *name;
pinmux_enum_t reserved_id;
struct pinmux_range data;
struct pinmux_range input;
struct pinmux_range input_pd;
struct pinmux_range input_pu;
struct pinmux_range output;
struct pinmux_range mark;
struct pinmux_range function;
unsigned first_gpio, last_gpio;
struct pinmux_gpio *gpios;
struct pinmux_cfg_reg *cfg_regs;
struct pinmux_data_reg *data_regs;
pinmux_enum_t *gpio_data;
unsigned int gpio_data_size;
unsigned long *gpio_in_use;
};
int register_pinmux(struct pinmux_info *pip);
int __gpio_request(unsigned gpio);
static inline int gpio_request(unsigned gpio, const char *label)
{
return __gpio_request(gpio);
}
void gpio_free(unsigned gpio);
int gpio_direction_input(unsigned gpio);
int gpio_direction_output(unsigned gpio, int value);
int gpio_get_value(unsigned gpio);
void gpio_set_value(unsigned gpio, int value);
static inline int gpio_export(unsigned gpio, bool direction_may_change)
{
return 0;
}
#endif /* __ASM_SH_GPIO_H */
......@@ -2,6 +2,7 @@
#define __ASM_SH_HW_IRQ_H
#include <linux/init.h>
#include <linux/sh_intc.h>
#include <asm/atomic.h>
extern atomic_t irq_err_count;
......@@ -23,101 +24,12 @@ struct ipr_desc {
void register_ipr_controller(struct ipr_desc *);
typedef unsigned char intc_enum;
struct intc_vect {
intc_enum enum_id;
unsigned short vect;
};
#define INTC_VECT(enum_id, vect) { enum_id, vect }
#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
struct intc_group {
intc_enum enum_id;
intc_enum enum_ids[32];
};
#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
struct intc_mask_reg {
unsigned long set_reg, clr_reg, reg_width;
intc_enum enum_ids[32];
#ifdef CONFIG_SMP
unsigned long smp;
#endif
};
struct intc_prio_reg {
unsigned long set_reg, clr_reg, reg_width, field_width;
intc_enum enum_ids[16];
#ifdef CONFIG_SMP
unsigned long smp;
#endif
};
struct intc_sense_reg {
unsigned long reg, reg_width, field_width;
intc_enum enum_ids[16];
};
#ifdef CONFIG_SMP
#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
#else
#define INTC_SMP(stride, nr)
#endif
struct intc_desc {
struct intc_vect *vectors;
unsigned int nr_vectors;
struct intc_group *groups;
unsigned int nr_groups;
struct intc_mask_reg *mask_regs;
unsigned int nr_mask_regs;
struct intc_prio_reg *prio_regs;
unsigned int nr_prio_regs;
struct intc_sense_reg *sense_regs;
unsigned int nr_sense_regs;
char *name;
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
struct intc_mask_reg *ack_regs;
unsigned int nr_ack_regs;
#endif
};
#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
mask_regs, prio_regs, sense_regs) \
struct intc_desc symbol __initdata = { \
_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
_INTC_ARRAY(sense_regs), \
chipname, \
}
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
mask_regs, prio_regs, sense_regs, ack_regs) \
struct intc_desc symbol __initdata = { \
_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
_INTC_ARRAY(sense_regs), \
chipname, \
_INTC_ARRAY(ack_regs), \
}
#endif
void __init register_intc_controller(struct intc_desc *desc);
int intc_set_priority(unsigned int irq, unsigned int prio);
void __init plat_irq_setup(void);
#ifdef CONFIG_CPU_SH3
void __init plat_irq_setup_sh3(void);
#endif
void __init plat_irq_setup_pins(int mode);
enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
void __init plat_irq_setup_pins(int mode);
#endif /* __ASM_SH_HW_IRQ_H */
#ifndef __ASM_SH_IO_H
#define __ASM_SH_IO_H
/*
* Convention:
* read{b,w,l}/write{b,w,l} are for PCI,
* read{b,w,l,q}/write{b,w,l,q} are for PCI,
* while in{b,w,l}/out{b,w,l} are for ISA
* These may (will) be platform specific function.
*
* In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
* and 'string' versions: ins{b,w,l}/outs{b,w,l}
* For read{b,w,l} and write{b,w,l} there are also __raw versions, which
* do not have a memory barrier after them.
*
* In addition, we have
* ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
* which are processor specific.
*/
/*
* We follow the Alpha convention here:
* __inb expands to an inline function call (which calls via the mv)
* _inb is a real function call (note ___raw fns are _ version of __raw)
* inb by default expands to _inb, but the machine specific code may
* define it to __inb if it chooses.
* While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
* automatically, there are also __raw versions, which do not.
*
* Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
* SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
* these have the same semantics as the __raw variants, and as such, all
* new code should be using the __raw versions.
*
* All ISA I/O routines are wrapped through the machine vector. If a
* board does not provide overrides, a generic set that are copied in
* from the default machine vector are used instead. These are largely
* for old compat code for I/O offseting to SuperIOs, all of which are
* better handled through the machvec ioport mapping routines these days.
*/
#include <asm/cache.h>
#include <asm/system.h>
......@@ -31,7 +30,6 @@
#include <asm-generic/iomap.h>
#ifdef __KERNEL__
/*
* Depending on which platform we are running on, we need different
* I/O functions.
......@@ -40,105 +38,68 @@
#include <asm/io_generic.h>
#include <asm/io_trapped.h>
#define maybebadio(port) \
printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
__FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0))
/*
* Since boards are able to define their own set of I/O routines through
* their respective machine vector, we always wrap through the mv.
*
* Also, in the event that a board hasn't provided its own definition for
* a given routine, it will be wrapped to generic code at run-time.
*/
#define inb(p) sh_mv.mv_inb((p))
#define inw(p) sh_mv.mv_inw((p))
#define inl(p) sh_mv.mv_inl((p))
#define outb(x,p) sh_mv.mv_outb((x),(p))
#define outw(x,p) sh_mv.mv_outw((x),(p))
#define outl(x,p) sh_mv.mv_outl((x),(p))
#define inb_p(p) sh_mv.mv_inb_p((p))
#define inw_p(p) sh_mv.mv_inw_p((p))
#define inl_p(p) sh_mv.mv_inl_p((p))
#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; })
#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; })
#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; })
#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; })
#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
#define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
#define __inb(p) sh_mv.mv_inb((p))
#define __inw(p) sh_mv.mv_inw((p))
#define __inl(p) sh_mv.mv_inl((p))
#define __outb(x,p) sh_mv.mv_outb((x),(p))
#define __outw(x,p) sh_mv.mv_outw((x),(p))
#define __outl(x,p) sh_mv.mv_outl((x),(p))
#define __inb_p(p) sh_mv.mv_inb_p((p))
#define __inw_p(p) sh_mv.mv_inw_p((p))
#define __inl_p(p) sh_mv.mv_inl_p((p))
#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
#define __readb(a) sh_mv.mv_readb((a))
#define __readw(a) sh_mv.mv_readw((a))
#define __readl(a) sh_mv.mv_readl((a))
#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
#define __writew(v,a) sh_mv.mv_writew((v),(a))
#define __writel(v,a) sh_mv.mv_writel((v),(a))
#define inb __inb
#define inw __inw
#define inl __inl
#define outb __outb
#define outw __outw
#define outl __outl
#define inb_p __inb_p
#define inw_p __inw_p
#define inl_p __inl_p
#define outb_p __outb_p
#define outw_p __outw_p
#define outl_p __outl_p
#define insb __insb
#define insw __insw
#define insl __insl
#define outsb __outsb
#define outsw __outsw
#define outsl __outsl
#define __raw_readb(a) __readb((void __iomem *)(a))
#define __raw_readw(a) __readw((void __iomem *)(a))
#define __raw_readl(a) __readl((void __iomem *)(a))
#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
void __raw_writesl(unsigned long addr, const void *data, int longlen);
void __raw_readsl(unsigned long addr, void *data, int longlen);
/* SuperH on-chip I/O functions */
#define ctrl_inb __raw_readb
#define ctrl_inw __raw_readw
#define ctrl_inl __raw_readl
#define ctrl_inq __raw_readq
/*
* The platform header files may define some of these macros to use
* the inlined versions where appropriate. These macros may also be
* redefined by userlevel programs.
*/
#ifdef __readb
# define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; })
#endif
#ifdef __raw_readw
# define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; })
#endif
#ifdef __raw_readl
# define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; })
#endif
#define ctrl_outb __raw_writeb
#define ctrl_outw __raw_writew
#define ctrl_outl __raw_writel
#define ctrl_outq __raw_writeq
#ifdef __raw_writeb
# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
#endif
#ifdef __raw_writew
# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
#endif
#ifdef __raw_writel
# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
static inline void ctrl_delay(void)
{
#ifdef P2SEG
__raw_readw(P2SEG);
#endif
}
#define __BUILD_MEMORY_STRING(bwlq, type) \
\
static inline void writes##bwlq(volatile void __iomem *mem, \
static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
const void *addr, unsigned int count) \
{ \
const volatile type *__addr = addr; \
......@@ -149,8 +110,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
} \
} \
\
static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
unsigned int count) \
static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
void *addr, unsigned int count) \
{ \
volatile type *__addr = addr; \
\
......@@ -162,106 +123,71 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
__BUILD_MEMORY_STRING(b, u8)
__BUILD_MEMORY_STRING(w, u16)
#define writesl __raw_writesl
#define readsl __raw_readsl
__BUILD_MEMORY_STRING(q, u64)
void __raw_writesl(void __iomem *addr, const void *data, int longlen);
void __raw_readsl(const void __iomem *addr, void *data, int longlen);
#define writesb __raw_writesb
#define writesw __raw_writesw
#define writesl __raw_writesl
#define readsb __raw_readsb
#define readsw __raw_readsw
#define readsl __raw_readsl
#define readb_relaxed(a) readb(a)
#define readw_relaxed(a) readw(a)
#define readl_relaxed(a) readl(a)
#define readb_relaxed(a) readb(a)
#define readw_relaxed(a) readw(a)
#define readl_relaxed(a) readl(a)
#define readq_relaxed(a) readq(a)
/* Simple MMIO */
#define ioread8(a) readb(a)
#define ioread16(a) readw(a)
#define ioread8(a) __raw_readb(a)
#define ioread16(a) __raw_readw(a)
#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
#define ioread32(a) readl(a)
#define ioread32(a) __raw_readl(a)
#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
#define iowrite8(v,a) writeb((v),(a))
#define iowrite16(v,a) writew((v),(a))
#define iowrite8(v,a) __raw_writeb((v),(a))
#define iowrite16(v,a) __raw_writew((v),(a))
#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
#define iowrite32(v,a) writel((v),(a))
#define iowrite32(v,a) __raw_writel((v),(a))
#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
#define ioread8_rep(a, d, c) readsb((a), (d), (c))
#define ioread16_rep(a, d, c) readsw((a), (d), (c))
#define ioread32_rep(a, d, c) readsl((a), (d), (c))
#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
#define iowrite8_rep(a, s, c) writesb((a), (s), (c))
#define iowrite16_rep(a, s, c) writesw((a), (s), (c))
#define iowrite32_rep(a, s, c) writesl((a), (s), (c))
#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
/* synco on SH-4A, otherwise a nop */
#define mmiowb() wmb()
#define IO_SPACE_LIMIT 0xffffffff
extern unsigned long generic_io_base;
/*
* This function provides a method for the generic case where a board-specific
* ioport_map simply needs to return the port + some arbitrary port base.
* This function provides a method for the generic case where a
* board-specific ioport_map simply needs to return the port + some
* arbitrary port base.
*
* We use this at board setup time to implicitly set the port base, and
* as a result, we can use the generic ioport_map.
*/
static inline void __set_io_port_base(unsigned long pbase)
{
extern unsigned long generic_io_base;
generic_io_base = pbase;
}
#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
/* We really want to try and get these to memcpy etc */
extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long);
extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
extern void memset_io(volatile void __iomem *, int, unsigned long);
/* SuperH on-chip I/O functions */
static inline unsigned char ctrl_inb(unsigned long addr)
{
return *(volatile unsigned char*)addr;
}
static inline unsigned short ctrl_inw(unsigned long addr)
{
return *(volatile unsigned short*)addr;
}
static inline unsigned int ctrl_inl(unsigned long addr)
{
return *(volatile unsigned long*)addr;
}
static inline unsigned long long ctrl_inq(unsigned long addr)
{
return *(volatile unsigned long long*)addr;
}
static inline void ctrl_outb(unsigned char b, unsigned long addr)
{
*(volatile unsigned char*)addr = b;
}
static inline void ctrl_outw(unsigned short b, unsigned long addr)
{
*(volatile unsigned short*)addr = b;
}
static inline void ctrl_outl(unsigned int b, unsigned long addr)
{
*(volatile unsigned long*)addr = b;
}
static inline void ctrl_outq(unsigned long long b, unsigned long addr)
{
*(volatile unsigned long long*)addr = b;
}
static inline void ctrl_delay(void)
{
#ifdef P2SEG
ctrl_inw(P2SEG);
#endif
}
void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
void memset_io(volatile void __iomem *, int, unsigned long);
/* Quad-word real-mode I/O, don't ask.. */
unsigned long long peek_real_address_q(unsigned long long addr);
......@@ -347,9 +273,15 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
__ioremap_mode((offset), (size), _PAGE_CACHABLE)
#define p3_ioremap(offset, size, flags) \
__ioremap((offset), (size), (flags))
#define ioremap_prot(offset, size, flags) \
__ioremap_mode((offset), (size), (flags))
#define iounmap(addr) \
__iounmap((addr))
#define maybebadio(port) \
printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
__func__, __LINE__, (port), (u32)__builtin_return_address(0))
/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
* access
......
......@@ -33,13 +33,6 @@ void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long
void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count);
void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count);
u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *);
u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *);
u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *);
void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *);
void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *);
void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *);
void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size);
void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
......
......@@ -41,6 +41,9 @@ static inline int generic_irq_demux(int irq)
#define irq_canonicalize(irq) (irq)
#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
void init_IRQ(void);
asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
#ifdef CONFIG_IRQSTACKS
extern void irq_ctx_init(int cpu);
extern void irq_ctx_exit(int cpu);
......
#ifndef __ASM_SH_KPROBES_H
#define __ASM_SH_KPROBES_H
#ifdef CONFIG_KPROBES
#include <linux/types.h>
#include <linux/ptrace.h>
typedef u16 kprobe_opcode_t;
#define BREAKPOINT_INSTRUCTION 0xc33a
#define MAX_INSN_SIZE 16
#define MAX_STACK_SIZE 64
#define MIN_STACK_SIZE(ADDR) (((MAX_STACK_SIZE) < \
(((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) \
? (MAX_STACK_SIZE) \
: (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR)))
#define regs_return_value(regs) ((regs)->regs[0])
#define flush_insn_slot(p) do { } while (0)
#define kretprobe_blacklist_size 0
struct kprobe;
void arch_remove_kprobe(struct kprobe *);
void kretprobe_trampoline(void);
void jprobe_return_end(void);
/* Architecture specific copy of original instruction*/
struct arch_specific_insn {
/* copy of the original instruction */
kprobe_opcode_t insn[MAX_INSN_SIZE];
};
struct prev_kprobe {
struct kprobe *kp;
unsigned long status;
};
/* per-cpu kprobe control block */
struct kprobe_ctlblk {
unsigned long kprobe_status;
unsigned long jprobe_saved_r15;
struct pt_regs jprobe_saved_regs;
kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE];
struct prev_kprobe prev_kprobe;
};
extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
extern int kprobe_exceptions_notify(struct notifier_block *self,
unsigned long val, void *data);
extern int kprobe_handle_illslot(unsigned long pc);
#else
#define kprobe_handle_illslot(pc) (-1)
#endif /* CONFIG_KPROBES */
#endif /* __ASM_SH_KPROBES_H */
......@@ -42,13 +42,6 @@ struct sh_machine_vector {
void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
u8 (*mv_readb)(void __iomem *);
u16 (*mv_readw)(void __iomem *);
u32 (*mv_readl)(void __iomem *);
void (*mv_writeb)(u8, void __iomem *);
void (*mv_writew)(u16, void __iomem *);
void (*mv_writel)(u32, void __iomem *);
int (*mv_irq_demux)(int irq);
void (*mv_init_irq)(void);
......
......@@ -4,6 +4,8 @@
#ifdef __KERNEL__
#ifdef CONFIG_NEED_MULTIPLE_NODES
#include <linux/numa.h>
extern struct pglist_data *node_data[];
#define NODE_DATA(nid) (node_data[nid])
......
......@@ -104,6 +104,8 @@ typedef struct { unsigned long pgd; } pgd_t;
typedef struct page *pgtable_t;
#define pte_pgprot(x) __pgprot(pte_val(x) & PTE_FLAGS_MASK)
#endif /* !__ASSEMBLY__ */
/*
......
......@@ -76,6 +76,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
#endif
#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK)
#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
#ifdef CONFIG_SUPERH32
#define VMALLOC_START (P3SEG)
......
......@@ -3,6 +3,7 @@
#include <asm/cpu-features.h>
#include <asm/segment.h>
#include <asm/cache.h>
#ifndef __ASSEMBLY__
/*
......@@ -43,11 +44,52 @@ enum cpu_type {
CPU_SH_NONE
};
/*
* TLB information structure
*
* Defined for both I and D tlb, per-processor.
*/
struct tlb_info {
unsigned long long next;
unsigned long long first;
unsigned long long last;
unsigned int entries;
unsigned int step;
unsigned long flags;
};
struct sh_cpuinfo {
unsigned int type;
int cut_major, cut_minor;
unsigned long loops_per_jiffy;
unsigned long asid_cache;
struct cache_info icache; /* Primary I-cache */
struct cache_info dcache; /* Primary D-cache */
struct cache_info scache; /* Secondary cache */
/* TLB info */
struct tlb_info itlb;
struct tlb_info dtlb;
unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));
extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
/* Forward decl */
struct sh_cpuinfo;
struct seq_operations;
extern struct pt_regs fake_swapper_regs;
/* arch/sh/kernel/setup.c */
const char *get_cpu_subtype(struct sh_cpuinfo *c);
extern const struct seq_operations cpuinfo_op;
#ifdef CONFIG_VSYSCALL
int vsyscall_init(void);
......
......@@ -10,9 +10,9 @@
#ifdef __KERNEL__
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
/*
......@@ -26,23 +26,7 @@
#define CCN_CVR 0xff000040
#define CCN_PRR 0xff000044
struct sh_cpuinfo {
unsigned int type;
int cut_major, cut_minor;
unsigned long loops_per_jiffy;
unsigned long asid_cache;
struct cache_info icache; /* Primary I-cache */
struct cache_info dcache; /* Primary D-cache */
struct cache_info scache; /* Secondary cache */
unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));
extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
asmlinkage void __init sh_cpu_init(void);
/*
* User space process size: 2GB.
......@@ -196,6 +180,8 @@ extern unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
#define user_stack_pointer(regs) ((regs)->regs[15])
#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
#define cpu_relax() barrier()
......
......@@ -17,7 +17,6 @@
#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
#include <cpu/registers.h>
......@@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \
: "1" (__dummy)); \
pc; })
/*
* TLB information structure
*
* Defined for both I and D tlb, per-processor.
*/
struct tlb_info {
unsigned long long next;
unsigned long long first;
unsigned long long last;
unsigned int entries;
unsigned int step;
unsigned long flags;
};
struct sh_cpuinfo {
enum cpu_type type;
unsigned long loops_per_jiffy;
unsigned long asid_cache;
unsigned int cpu_clock, master_clock, bus_clock, module_clock;
/* Cache info */
struct cache_info icache;
struct cache_info dcache;
struct cache_info scache;
/* TLB info */
struct tlb_info itlb;
struct tlb_info dtlb;
unsigned long flags;
};
extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
#endif
/*
......@@ -169,8 +128,6 @@ struct thread_struct {
#define INIT_MMAP \
{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
extern struct pt_regs fake_swapper_regs;
#define INIT_THREAD { \
.sp = sizeof(init_stack) + \
(long) &init_stack, \
......@@ -269,6 +226,8 @@ extern unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) ((tsk)->thread.pc)
#define KSTK_ESP(tsk) ((tsk)->thread.sp)
#define user_stack_pointer(regs) ((regs)->sp)
#define cpu_relax() barrier()
#endif /* __ASSEMBLY__ */
......
......@@ -87,12 +87,18 @@ struct pt_dspregs {
unsigned long mod;
};
#define PTRACE_GETREGS 12 /* General registers */
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14 /* FPU registers */
#define PTRACE_SETFPREGS 15
#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
#define PTRACE_GETDSPREGS 55
#define PTRACE_GETDSPREGS 55 /* DSP registers */
#define PTRACE_SETDSPREGS 56
#endif
......@@ -117,6 +123,9 @@ extern void user_disable_single_step(struct task_struct *);
#define task_pt_regs(task) \
((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
- sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1)
#define task_pt_dspregs(task) \
((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE \
- sizeof(unsigned long)) - 1)
#else
#define task_pt_regs(task) \
((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
......
#ifndef _ASM_RTC_H
#define _ASM_RTC_H
void time_init(void);
extern void (*board_time_init)(void);
extern void (*rtc_sh_get_time)(struct timespec *);
extern int (*rtc_sh_set_time)(const time_t);
......
......@@ -4,7 +4,6 @@
#define COMMAND_LINE_SIZE 256
#ifdef __KERNEL__
/*
* This is set up by the setup-routine at boot-time
*/
......
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* DO NOT EDIT!! - this file automatically generated
* from .s file by awk -f s2h.awk
*/
/* Size definitions
* Copyright (C) ARM Limited 1998. All rights reserved.
*/
#ifndef __sizes_h
#define __sizes_h 1
/* handy sizes */
#define SZ_16 0x00000010
#define SZ_32 0x00000020
#define SZ_64 0x00000040
#define SZ_128 0x00000080
#define SZ_256 0x00000100
#define SZ_512 0x00000200
#define SZ_1K 0x00000400
#define SZ_4K 0x00001000
#define SZ_8K 0x00002000
#define SZ_16K 0x00004000
#define SZ_32K 0x00008000
#define SZ_64K 0x00010000
#define SZ_128K 0x00020000
#define SZ_256K 0x00040000
#define SZ_512K 0x00080000
#define SZ_1M 0x00100000
#define SZ_2M 0x00200000
#define SZ_4M 0x00400000
#define SZ_8M 0x00800000
#define SZ_16M 0x01000000
#define SZ_26M 0x01a00000
#define SZ_32M 0x02000000
#define SZ_64M 0x04000000
#define SZ_128M 0x08000000
#define SZ_256M 0x10000000
#define SZ_512M 0x20000000
#define SZ_1G 0x40000000
#define SZ_2G 0x80000000
#endif
/* END */
......@@ -21,25 +21,29 @@ extern int __cpu_number_map[NR_CPUS];
extern int __cpu_logical_map[NR_CPUS];
#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
/* I've no idea what the real meaning of this is */
#define PROC_CHANGE_PENALTY 20
enum {
SMP_MSG_FUNCTION,
SMP_MSG_RESCHEDULE,
SMP_MSG_FUNCTION_SINGLE,
SMP_MSG_TIMER,
#define NO_PROC_ID (-1)
SMP_MSG_NR, /* must be last */
};
#define SMP_MSG_FUNCTION 0
#define SMP_MSG_RESCHEDULE 1
#define SMP_MSG_FUNCTION_SINGLE 2
#define SMP_MSG_NR 3
void smp_message_recv(unsigned int msg);
void smp_timer_broadcast(cpumask_t mask);
void local_timer_interrupt(void);
void local_timer_setup(unsigned int cpu);
void plat_smp_setup(void);
void plat_prepare_cpus(unsigned int max_cpus);
int plat_smp_processor_id(void);
void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
void plat_send_ipi(unsigned int cpu, unsigned int message);
int plat_register_ipi_handler(unsigned int message,
void (*handler)(void *), void *arg);
extern void arch_send_call_function_single_ipi(int cpu);
extern void arch_send_call_function_ipi(cpumask_t mask);
void arch_send_call_function_single_ipi(int cpu);
void arch_send_call_function_ipi(cpumask_t mask);
#else
......
#ifndef __ASM_SH_SYSCALL_H
#define __ASM_SH_SYSCALL_H
#ifdef CONFIG_SUPERH32
# include "syscall_32.h"
#else
# include "syscall_64.h"
#endif
#endif /* __ASM_SH_SYSCALL_H */
#ifndef __ASM_SH_SYSCALL_32_H
#define __ASM_SH_SYSCALL_32_H
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/ptrace.h>
/* The system call number is given by the user in %g1 */
static inline long syscall_get_nr(struct task_struct *task,
struct pt_regs *regs)
{
return (regs->tra >= 0) ? regs->regs[3] : -1L;
}
static inline void syscall_rollback(struct task_struct *task,
struct pt_regs *regs)
{
/*
* XXX: This needs some thought. On SH we don't
* save away the original r0 value anywhere.
*/
}
static inline bool syscall_has_error(struct pt_regs *regs)
{
return (regs->sr & 0x1) ? true : false;
}
static inline void syscall_set_error(struct pt_regs *regs)
{
regs->sr |= 0x1;
}
static inline void syscall_clear_error(struct pt_regs *regs)
{
regs->sr &= ~0x1;
}
static inline long syscall_get_error(struct task_struct *task,
struct pt_regs *regs)
{
return syscall_has_error(regs) ? regs->regs[0] : 0;
}
static inline long syscall_get_return_value(struct task_struct *task,
struct pt_regs *regs)
{
return regs->regs[0];
}
static inline void syscall_set_return_value(struct task_struct *task,
struct pt_regs *regs,
int error, long val)
{
if (error) {
syscall_set_error(regs);
regs->regs[0] = -error;
} else {
syscall_clear_error(regs);
regs->regs[0] = val;
}
}
static inline void syscall_get_arguments(struct task_struct *task,
struct pt_regs *regs,
unsigned int i, unsigned int n,
unsigned long *args)
{
/*
* Do this simply for now. If we need to start supporting
* fetching arguments from arbitrary indices, this will need some
* extra logic. Presently there are no in-tree users that depend
* on this behaviour.
*/
BUG_ON(i);
/* Argument pattern is: R4, R5, R6, R7, R0, R1 */
switch (n) {
case 6: args[5] = regs->regs[1];
case 5: args[4] = regs->regs[0];
case 4: args[3] = regs->regs[7];
case 3: args[2] = regs->regs[6];
case 2: args[1] = regs->regs[5];
case 1: args[0] = regs->regs[4];
break;
default:
BUG();
}
}
static inline void syscall_set_arguments(struct task_struct *task,
struct pt_regs *regs,
unsigned int i, unsigned int n,
const unsigned long *args)
{
/* Same note as above applies */
BUG_ON(i);
switch (n) {
case 6: regs->regs[1] = args[5];
case 5: regs->regs[0] = args[4];
case 4: regs->regs[7] = args[3];
case 3: regs->regs[6] = args[2];
case 2: regs->regs[5] = args[1];
case 1: regs->regs[4] = args[0];
break;
default:
BUG();
}
}
#endif /* __ASM_SH_SYSCALL_32_H */
#ifndef __ASM_SH_SYSCALL_64_H
#define __ASM_SH_SYSCALL_64_H
#include <asm-generic/syscall.h>
#endif /* __ASM_SH_SYSCALL_64_H */
#ifndef __ASM_SH_SYSCALLS_H
#define __ASM_SH_SYSCALLS_H
#ifdef __KERNEL__
struct old_utsname;
asmlinkage int old_mmap(unsigned long addr, unsigned long len,
unsigned long prot, unsigned long flags,
int fd, unsigned long off);
asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
unsigned long prot, unsigned long flags,
unsigned long fd, unsigned long pgoff);
asmlinkage int sys_ipc(uint call, int first, int second,
int third, void __user *ptr, long fifth);
asmlinkage int sys_uname(struct old_utsname __user *name);
#ifdef CONFIG_SUPERH32
# include "syscalls_32.h"
#else
# include "syscalls_64.h"
#endif
#endif /* __KERNEL__ */
#endif /* __ASM_SH_SYSCALLS_H */
#ifndef __ASM_SH_SYSCALLS_32_H
#define __ASM_SH_SYSCALLS_32_H
#ifdef __KERNEL__
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <linux/types.h>
struct pt_regs;
asmlinkage int sys_fork(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
unsigned long parent_tidptr,
unsigned long child_tidptr,
struct pt_regs __regs);
asmlinkage int sys_vfork(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_execve(char __user *ufilename, char __user * __user *uargv,
char __user * __user *uenvp, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_sigsuspend(old_sigset_t mask, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_sigaction(int sig, const struct old_sigaction __user *act,
struct old_sigaction __user *oact);
asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_sigreturn(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_rt_sigreturn(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char __user *buf,
size_t count, long dummy, loff_t pos);
asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char __user *buf,
size_t count, long dummy, loff_t pos);
asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1,
u32 len0, u32 len1, int advice);
/* Misc syscall related bits */
asmlinkage long do_syscall_trace_enter(struct pt_regs *regs);
asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,
unsigned long thread_info_flags);
#endif /* __KERNEL__ */
#endif /* __ASM_SH_SYSCALLS_32_H */
#ifndef __ASM_SH_SYSCALLS_64_H
#define __ASM_SH_SYSCALLS_64_H
#ifdef __KERNEL__
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <linux/types.h>
struct pt_regs;
asmlinkage int sys_fork(unsigned long r2, unsigned long r3,
unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs *pregs);
asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs *pregs);
asmlinkage int sys_vfork(unsigned long r2, unsigned long r3,
unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs *pregs);
asmlinkage int sys_execve(char *ufilename, char **uargv,
char **uenvp, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs *pregs);
/* Misc syscall related bits */
asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs);
asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
#endif /* __KERNEL__ */
#endif /* __ASM_SH_SYSCALLS_64_H */
......@@ -70,6 +70,8 @@
#ifdef CONFIG_GUSA_RB
#include <asm/cmpxchg-grb.h>
#elif defined(CONFIG_CPU_SH4A)
#include <asm/cmpxchg-llsc.h>
#else
#include <asm/cmpxchg-irq.h>
#endif
......@@ -125,6 +127,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
})
extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
void free_initmem(void);
void free_initrd_mem(unsigned long start, unsigned long end);
extern void *set_exception_table_vec(unsigned int vec, void *handler);
......@@ -177,8 +181,8 @@ BUILD_TRAP_HANDLER(fpu_state_restore);
#define arch_align_stack(x) (x)
struct mem_access {
unsigned long (*from)(void *dst, const void *src, unsigned long cnt);
unsigned long (*to)(void *dst, const void *src, unsigned long cnt);
unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt);
unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt);
};
#ifdef CONFIG_SUPERH32
......
......@@ -58,7 +58,8 @@ do { \
last = __last; \
} while (0)
#define __uses_jump_to_uncached __attribute__ ((__section__ (".uncached.text")))
#define __uses_jump_to_uncached \
noinline __attribute__ ((__section__ (".uncached.text")))
/*
* Jump to uncached area.
......@@ -96,7 +97,48 @@ do { \
: "=&r" (__dummy)); \
} while (0)
#ifdef CONFIG_CPU_HAS_SR_RB
#define lookup_exception_vector() \
({ \
unsigned long _vec; \
\
__asm__ __volatile__ ( \
"stc r2_bank, %0\n\t" \
: "=r" (_vec) \
); \
\
_vec; \
})
#else
#define lookup_exception_vector() \
({ \
unsigned long _vec; \
__asm__ __volatile__ ( \
"mov r4, %0\n\t" \
: "=r" (_vec) \
); \
\
_vec; \
})
#endif
int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs,
struct mem_access *ma);
asmlinkage void do_address_error(struct pt_regs *regs,
unsigned long writeaccess,
unsigned long address);
asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs);
#endif /* __ASM_SH_SYSTEM_32_H */
......@@ -33,20 +33,12 @@ struct thread_info {
#define PREEMPT_ACTIVE 0x10000000
#if defined(CONFIG_4KSTACKS)
#define THREAD_SIZE_ORDER (0)
#elif defined(CONFIG_PAGE_SIZE_4KB)
#define THREAD_SIZE_ORDER (1)
#elif defined(CONFIG_PAGE_SIZE_8KB)
#define THREAD_SIZE_ORDER (1)
#elif defined(CONFIG_PAGE_SIZE_16KB)
#define THREAD_SIZE_ORDER (0)
#elif defined(CONFIG_PAGE_SIZE_64KB)
#define THREAD_SIZE_ORDER (0)
#define THREAD_SHIFT 12
#else
#error "Unknown thread size"
#define THREAD_SHIFT 13
#endif
#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
#define THREAD_SIZE (1 << THREAD_SHIFT)
#define STACK_WARN (THREAD_SIZE >> 3)
/*
......@@ -94,15 +86,19 @@ static inline struct thread_info *current_thread_info(void)
return ti;
}
/* thread information allocation */
#if THREAD_SHIFT >= PAGE_SHIFT
#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
#else /* THREAD_SHIFT < PAGE_SHIFT */
#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
/* thread information allocation */
#ifdef CONFIG_DEBUG_STACK_USAGE
#define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL)
#else
#define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL)
#endif
#define free_thread_info(ti) kfree(ti)
extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
extern void free_thread_info(struct thread_info *ti);
#endif /* THREAD_SHIFT < PAGE_SHIFT */
#endif /* __ASSEMBLY__ */
......
......@@ -26,16 +26,20 @@ do { \
retval = 0; \
switch (size) { \
case 1: \
retval = __get_user_asm_b(x, ptr); \
retval = __get_user_asm_b((void *)&x, \
(long)ptr); \
break; \
case 2: \
retval = __get_user_asm_w(x, ptr); \
retval = __get_user_asm_w((void *)&x, \
(long)ptr); \
break; \
case 4: \
retval = __get_user_asm_l(x, ptr); \
retval = __get_user_asm_l((void *)&x, \
(long)ptr); \
break; \
case 8: \
retval = __get_user_asm_q(x, ptr); \
retval = __get_user_asm_q((void *)&x, \
(long)ptr); \
break; \
default: \
__get_user_unknown(); \
......@@ -54,16 +58,20 @@ do { \
retval = 0; \
switch (size) { \
case 1: \
retval = __put_user_asm_b(x, ptr); \
retval = __put_user_asm_b((void *)&x, \
(long)ptr); \
break; \
case 2: \
retval = __put_user_asm_w(x, ptr); \
retval = __put_user_asm_w((void *)&x, \
(long)ptr); \
break; \
case 4: \
retval = __put_user_asm_l(x, ptr); \
retval = __put_user_asm_l((void *)&x, \
(long)ptr); \
break; \
case 8: \
retval = __put_user_asm_q(x, ptr); \
retval = __put_user_asm_q((void *)&x, \
(long)ptr); \
break; \
default: \
__put_user_unknown(); \
......@@ -77,5 +85,7 @@ extern long __put_user_asm_q(void *, long);
extern void __put_user_unknown(void);
extern long __strnlen_user(const char *__s, long __n);
extern int __strncpy_from_user(unsigned long __dest,
unsigned long __user __src, int __count);
#endif /* __ASM_SH_UACCESS_64_H */
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......@@ -52,9 +52,11 @@
#define PORT_HIZCRB 0xa405015a
#define PORT_HIZCRC 0xa405015c
#define BSC_CS4BCR 0xfec10010
#define BSC_CS6ABCR 0xfec1001c
#define BSC_CS4WCR 0xfec10030
#include <asm/sh_mobile_lcdc.h>
#include <video/sh_mobile_lcdc.h>
int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
......
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