提交 e00e7cb3 编写于 作者: N Nobuhiro Iwamatsu 提交者: Paul Mundt

sh: sh2: Change the specification method of IRQ to SCIx_IRQ_MUXED

Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
This is correction to the SH2/SH2A series.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
上级 545f3bcf
...@@ -65,7 +65,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -65,7 +65,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 88, 88, 88, 88 }, .irqs = SCIx_IRQ_MUXED(88),
}; };
static struct platform_device scif0_device = { static struct platform_device scif0_device = {
...@@ -82,7 +82,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -82,7 +82,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 92, 92, 92, 92 }, .irqs = SCIx_IRQ_MUXED(92),
}; };
static struct platform_device scif1_device = { static struct platform_device scif1_device = {
...@@ -99,7 +99,7 @@ static struct plat_sci_port scif2_platform_data = { ...@@ -99,7 +99,7 @@ static struct plat_sci_port scif2_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 96, 96, 96, 96 }, .irqs = SCIx_IRQ_MUXED(96),
}; };
static struct platform_device scif2_device = { static struct platform_device scif2_device = {
......
...@@ -204,7 +204,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -204,7 +204,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 220, 220, 220, 220 }, .irqs = SCIx_IRQ_MUXED(220),
}; };
static struct platform_device scif0_device = { static struct platform_device scif0_device = {
......
...@@ -183,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -183,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 180, 180, 180, 180 } .irqs = SCIx_IRQ_MUXED(180),
}; };
static struct platform_device scif0_device = { static struct platform_device scif0_device = {
...@@ -200,7 +200,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -200,7 +200,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 184, 184, 184, 184 } .irqs = SCIx_IRQ_MUXED(184),
}; };
static struct platform_device scif1_device = { static struct platform_device scif1_device = {
...@@ -217,7 +217,7 @@ static struct plat_sci_port scif2_platform_data = { ...@@ -217,7 +217,7 @@ static struct plat_sci_port scif2_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 188, 188, 188, 188 } .irqs = SCIx_IRQ_MUXED(188),
}; };
static struct platform_device scif2_device = { static struct platform_device scif2_device = {
...@@ -234,7 +234,7 @@ static struct plat_sci_port scif3_platform_data = { ...@@ -234,7 +234,7 @@ static struct plat_sci_port scif3_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 192, 192, 192, 192 } .irqs = SCIx_IRQ_MUXED(192),
}; };
static struct platform_device scif3_device = { static struct platform_device scif3_device = {
...@@ -251,7 +251,7 @@ static struct plat_sci_port scif4_platform_data = { ...@@ -251,7 +251,7 @@ static struct plat_sci_port scif4_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 196, 196, 196, 196 } .irqs = SCIx_IRQ_MUXED(196),
}; };
static struct platform_device scif4_device = { static struct platform_device scif4_device = {
...@@ -268,7 +268,7 @@ static struct plat_sci_port scif5_platform_data = { ...@@ -268,7 +268,7 @@ static struct plat_sci_port scif5_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 200, 200, 200, 200 } .irqs = SCIx_IRQ_MUXED(200),
}; };
static struct platform_device scif5_device = { static struct platform_device scif5_device = {
...@@ -285,7 +285,7 @@ static struct plat_sci_port scif6_platform_data = { ...@@ -285,7 +285,7 @@ static struct plat_sci_port scif6_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 204, 204, 204, 204 } .irqs = SCIx_IRQ_MUXED(204),
}; };
static struct platform_device scif6_device = { static struct platform_device scif6_device = {
...@@ -302,7 +302,7 @@ static struct plat_sci_port scif7_platform_data = { ...@@ -302,7 +302,7 @@ static struct plat_sci_port scif7_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 208, 208, 208, 208 } .irqs = SCIx_IRQ_MUXED(208),
}; };
static struct platform_device scif7_device = { static struct platform_device scif7_device = {
......
...@@ -180,7 +180,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -180,7 +180,7 @@ static struct plat_sci_port scif0_platform_data = {
SCSCR_REIE, SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 192, 192, 192, 192 }, .irqs = SCIx_IRQ_MUXED(192),
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
...@@ -199,7 +199,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -199,7 +199,7 @@ static struct plat_sci_port scif1_platform_data = {
SCSCR_REIE, SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 196, 196, 196, 196 }, .irqs = SCIx_IRQ_MUXED(196),
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
...@@ -218,7 +218,7 @@ static struct plat_sci_port scif2_platform_data = { ...@@ -218,7 +218,7 @@ static struct plat_sci_port scif2_platform_data = {
SCSCR_REIE, SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 200, 200, 200, 200 }, .irqs = SCIx_IRQ_MUXED(200),
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
...@@ -237,7 +237,7 @@ static struct plat_sci_port scif3_platform_data = { ...@@ -237,7 +237,7 @@ static struct plat_sci_port scif3_platform_data = {
SCSCR_REIE, SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 204, 204, 204, 204 }, .irqs = SCIx_IRQ_MUXED(204),
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
......
...@@ -139,7 +139,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -139,7 +139,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 240, 240, 240, 240 }, .irqs = SCIx_IRQ_MUXED(240),
}; };
static struct platform_device scif0_device = { static struct platform_device scif0_device = {
...@@ -156,7 +156,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -156,7 +156,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 244, 244, 244, 244 }, .irqs = SCIx_IRQ_MUXED(244),
}; };
static struct platform_device scif1_device = { static struct platform_device scif1_device = {
...@@ -173,7 +173,7 @@ static struct plat_sci_port scif2_platform_data = { ...@@ -173,7 +173,7 @@ static struct plat_sci_port scif2_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 248, 248, 248, 248 }, .irqs = SCIx_IRQ_MUXED(248),
}; };
static struct platform_device scif2_device = { static struct platform_device scif2_device = {
...@@ -190,7 +190,7 @@ static struct plat_sci_port scif3_platform_data = { ...@@ -190,7 +190,7 @@ static struct plat_sci_port scif3_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 252, 252, 252, 252 }, .irqs = SCIx_IRQ_MUXED(252),
}; };
static struct platform_device scif3_device = { static struct platform_device scif3_device = {
......
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