提交 d9bb3fb1 编写于 作者: S Soren Brinkmann 提交者: Greg Kroah-Hartman

tty: xuartps: Rebrand driver as Cadence UART

Zynq's UART is Cadence IP. Make this visible in the prompt in kconfig
and additional comments in the driver.
This also renames functions and symbols, as far as possible without
breaking user space API, to reflect the Cadence origin. This is achieved
through simple search and replace:
 - s/XUARTPS/CDNS_UART/g
 - s/xuartps/cdns_uart/g
The only exceptions are PORT_XUARTPS and the driver name, which stay as is,
due to their exposure to user space. As well as the - no legacy -
compatibility string 'xlnx,xuartps'
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
上级 b494a5fa
...@@ -1369,18 +1369,19 @@ config SERIAL_MXS_AUART_CONSOLE ...@@ -1369,18 +1369,19 @@ config SERIAL_MXS_AUART_CONSOLE
Enable a MXS AUART port to be the system console. Enable a MXS AUART port to be the system console.
config SERIAL_XILINX_PS_UART config SERIAL_XILINX_PS_UART
tristate "Xilinx PS UART support" tristate "Cadence (Xilinx Zynq) UART support"
depends on OF depends on OF
select SERIAL_CORE select SERIAL_CORE
help help
This driver supports the Xilinx PS UART port. This driver supports the Cadence UART. It is found e.g. in Xilinx
Zynq.
config SERIAL_XILINX_PS_UART_CONSOLE config SERIAL_XILINX_PS_UART_CONSOLE
bool "Xilinx PS UART console support" bool "Cadence UART console support"
depends on SERIAL_XILINX_PS_UART=y depends on SERIAL_XILINX_PS_UART=y
select SERIAL_CORE_CONSOLE select SERIAL_CORE_CONSOLE
help help
Enable a Xilinx PS UART port to be the system console. Enable a Cadence UART port to be the system console.
config SERIAL_AR933X config SERIAL_AR933X
tristate "AR933X serial port support" tristate "AR933X serial port support"
......
此差异已折叠。
...@@ -211,7 +211,7 @@ ...@@ -211,7 +211,7 @@
/* VIA VT8500 SoC */ /* VIA VT8500 SoC */
#define PORT_VT8500 97 #define PORT_VT8500 97
/* Xilinx PSS UART */ /* Cadence (Xilinx Zynq) UART */
#define PORT_XUARTPS 98 #define PORT_XUARTPS 98
/* Atheros AR933X SoC */ /* Atheros AR933X SoC */
......
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