提交 d30982b9 编写于 作者: I Ivan Khoronzhuk 提交者: Santosh Shilimkar

Documentation: dt: add bindings for keystone pll control controller

The main pll controller used to drive theC66x CorePacs, the switch fabric,
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
the NETCP modules) requires a PLL Controller to manage the various clock
divisions, gating, and synchronization.
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
[santosh.shilimkar@ti.com: Fixed the subject line]
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
上级 caee0055
* Device tree bindings for Texas Instruments keystone pll controller
The main pll controller used to drive theC66x CorePacs, the switch fabric,
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
the NETCP modules) requires a PLL Controller to manage the various clock
divisions, gating, and synchronization.
Required properties:
- compatible: "ti,keystone-pllctrl", "syscon"
- reg: contains offset/length value for pll controller
registers space.
Example:
pllctrl: pll-controller@0x02310000 {
compatible = "ti,keystone-pllctrl", "syscon";
reg = <0x02310000 0x200>;
};
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