Documentation: dt: add bindings for keystone pll control controller
The main pll controller used to drive theC66x CorePacs, the switch fabric, and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and the NETCP modules) requires a PLL Controller to manage the various clock divisions, gating, and synchronization. Reviewed-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com> [santosh.shilimkar@ti.com: Fixed the subject line] Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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