提交 d204b2c5 编写于 作者: L Lei Wen 提交者: Eric Miao

ARM: pxa910: correct nand pmu setting

The original pair of <0x01db, 208000000> is invalid.
Correct to the valid value.
Signed-off-by: NLei Wen <leiwen@marvell.com>
Cc: stable@kernel.org
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
上级 beb0c9b0
......@@ -110,7 +110,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
static APMU_CLK(nand, NAND, 0x01db, 208000000);
static APMU_CLK(nand, NAND, 0x19b, 156000000);
static APMU_CLK(u2o, USB, 0x1b, 480000000);
/* device and clock bindings */
......
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