提交 ca3d241c 编写于 作者: J Joseph Lo 提交者: Stephen Warren

ARM: tegra: enable data prefetch on L2

Enable the data prefetch on L2. The bit28 in aux ctrl register.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
上级 ffa05e45
......@@ -121,7 +121,7 @@ static void __init tegra_init_cache(void)
cache_type = readl(p + L2X0_CACHE_TYPE);
aux_ctrl = (cache_type & 0x700) << (17-8);
aux_ctrl |= 0x6C000001;
aux_ctrl |= 0x7C000001;
l2x0_of_init(aux_ctrl, 0x8200c3fe);
#endif
......
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