提交 c6023202 编写于 作者: S Scott Wood

powerpc/fsl: Force coherent memory on e500mc derivatives

In CoreNet systems it is not allowed to mix M and non-M mappings to the
same memory, and coherent DMA accesses are considered to be M mappings
for this purpose.  Ignoring this has been observed to cause hard
lockups in non-SMP kernels on e6500.

Furthermore, e6500 implements the LRAT (logical to real address table)
which allows KVM guests to control the WIMGE bits.  This means that
KVM cannot force the M bit on the way it usually does, so the guest had
better set it itself.
Signed-off-by: NScott Wood <scottwood@freescale.com>
上级 0d61f0b3
...@@ -109,7 +109,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); ...@@ -109,7 +109,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
* the processor might need it for DMA coherency. * the processor might need it for DMA coherency.
*/ */
#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE) #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) #if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \
defined(CONFIG_PPC_E500MC)
#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT) #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
#else #else
#define _PAGE_BASE (_PAGE_BASE_NC) #define _PAGE_BASE (_PAGE_BASE_NC)
......
...@@ -1313,11 +1313,14 @@ skpinv: addi r6,r6,1 /* Increment */ ...@@ -1313,11 +1313,14 @@ skpinv: addi r6,r6,1 /* Increment */
sync sync
isync isync
/* The mapping only needs to be cache-coherent on SMP */ /*
#ifdef CONFIG_SMP * The mapping only needs to be cache-coherent on SMP, except on
#define M_IF_SMP MAS2_M * Freescale e500mc derivatives where it's also needed for coherent DMA.
*/
#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
#define M_IF_NEEDED MAS2_M
#else #else
#define M_IF_SMP 0 #define M_IF_NEEDED 0
#endif #endif
/* 6. Setup KERNELBASE mapping in TLB[0] /* 6. Setup KERNELBASE mapping in TLB[0]
...@@ -1332,7 +1335,7 @@ skpinv: addi r6,r6,1 /* Increment */ ...@@ -1332,7 +1335,7 @@ skpinv: addi r6,r6,1 /* Increment */
ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_1GB))@l ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_1GB))@l
mtspr SPRN_MAS1,r6 mtspr SPRN_MAS1,r6
LOAD_REG_IMMEDIATE(r6, PAGE_OFFSET | M_IF_SMP) LOAD_REG_IMMEDIATE(r6, PAGE_OFFSET | M_IF_NEEDED)
mtspr SPRN_MAS2,r6 mtspr SPRN_MAS2,r6
rlwinm r5,r5,0,0,25 rlwinm r5,r5,0,0,25
......
...@@ -152,11 +152,14 @@ skpinv: addi r6,r6,1 /* Increment */ ...@@ -152,11 +152,14 @@ skpinv: addi r6,r6,1 /* Increment */
tlbivax 0,r9 tlbivax 0,r9
TLBSYNC TLBSYNC
/* The mapping only needs to be cache-coherent on SMP */ /*
#ifdef CONFIG_SMP * The mapping only needs to be cache-coherent on SMP, except on
#define M_IF_SMP MAS2_M * Freescale e500mc derivatives where it's also needed for coherent DMA.
*/
#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
#define M_IF_NEEDED MAS2_M
#else #else
#define M_IF_SMP 0 #define M_IF_NEEDED 0
#endif #endif
#if defined(ENTRY_MAPPING_BOOT_SETUP) #if defined(ENTRY_MAPPING_BOOT_SETUP)
...@@ -167,8 +170,8 @@ skpinv: addi r6,r6,1 /* Increment */ ...@@ -167,8 +170,8 @@ skpinv: addi r6,r6,1 /* Increment */
lis r6,(MAS1_VALID|MAS1_IPROT)@h lis r6,(MAS1_VALID|MAS1_IPROT)@h
ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
mtspr SPRN_MAS1,r6 mtspr SPRN_MAS1,r6
lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@h
ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@l
mtspr SPRN_MAS2,r6 mtspr SPRN_MAS2,r6
mtspr SPRN_MAS3,r8 mtspr SPRN_MAS3,r8
tlbwe tlbwe
......
...@@ -112,7 +112,7 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys, ...@@ -112,7 +112,7 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
tsize = __ilog2(size) - 10; tsize = __ilog2(size) - 10;
#ifdef CONFIG_SMP #if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
if ((flags & _PAGE_NO_CACHE) == 0) if ((flags & _PAGE_NO_CACHE) == 0)
flags |= _PAGE_COHERENT; flags |= _PAGE_COHERENT;
#endif #endif
......
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