提交 c54b7bbb 编写于 作者: D Daniel Lezcano 提交者: Nicolas Ferre

ARM: at91: coding style fixes

This patch is mindless and does only fix the line length.
The purpose is to facilitate the review of the next patches.
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
上级 9918ceaf
......@@ -20,9 +20,12 @@ static inline u32 sdram_selfrefresh_enable(void)
return saved_lpr;
}
#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
: : "r" (0))
#define sdram_selfrefresh_disable(saved_lpr) \
at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
#define wait_for_interrupt_enable() \
asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
: : "r" (0))
#elif defined(CONFIG_ARCH_AT91SAM9G45)
#include <mach/at91sam9_ddrsdr.h>
......@@ -59,6 +62,7 @@ static inline u32 sdram_selfrefresh_enable(void)
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
} while (0)
#define wait_for_interrupt_enable() cpu_do_idle()
#else
......@@ -79,11 +83,15 @@ static inline u32 sdram_selfrefresh_enable(void)
saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
AT91_SDRAMC_LPCB_SELF_REFRESH);
return saved_lpr;
}
#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
#define wait_for_interrupt_enable() cpu_do_idle()
#define sdram_selfrefresh_disable(saved_lpr) \
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
#define wait_for_interrupt_enable() \
cpu_do_idle()
#endif
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