提交 c22487b8 编写于 作者: K Kristina Martšenko 提交者: Greg Kroah-Hartman

staging: sep: remove driver

Looks like no one's working on the driver anymore, so remove it for now.
If someone wants to work on moving it out of staging, this commit can be
reverted.
Signed-off-by: NKristina Martšenko <kristina.martsenko@gmail.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Mark A. Allyn <mark.a.allyn@intel.com>
Cc: Jayant Mangalampalli <jayant.mangalampalli@intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
上级 6b5886f8
......@@ -64,8 +64,6 @@ source "drivers/staging/vt6655/Kconfig"
source "drivers/staging/vt6656/Kconfig"
source "drivers/staging/sep/Kconfig"
source "drivers/staging/iio/Kconfig"
source "drivers/staging/xgifb/Kconfig"
......
......@@ -26,7 +26,6 @@ obj-$(CONFIG_OCTEON_USB) += octeon-usb/
obj-$(CONFIG_VT6655) += vt6655/
obj-$(CONFIG_VT6656) += vt6656/
obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_DX_SEP) += sep/
obj-$(CONFIG_IIO) += iio/
obj-$(CONFIG_FB_XGI) += xgifb/
obj-$(CONFIG_USB_EMXX) += emxx_udc/
......
config DX_SEP
tristate "Discretix SEP driver"
depends on PCI && CRYPTO
help
Discretix SEP driver; used for the security processor subsystem
on board the Intel Mobile Internet Device and adds SEP availability
to the kernel crypto infrastructure
The driver's name is sep_driver.
If unsure, select N.
ccflags-y += -I$(srctree)/$(src)
obj-$(CONFIG_DX_SEP) += sep_driver.o
sep_driver-objs := sep_crypto.o sep_main.o
Todo's so far (from Alan Cox)
- Clean up unused ioctls
- Clean up unused fields in ioctl structures
此差异已折叠。
/*
*
* sep_crypto.h - Crypto interface structures
*
* Copyright(c) 2009-2011 Intel Corporation. All rights reserved.
* Contributions(c) 2009-2010 Discretix. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59
* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
* CONTACTS:
*
* Mark Allyn mark.a.allyn@intel.com
* Jayant Mangalampalli jayant.mangalampalli@intel.com
*
* CHANGES:
*
* 2009.06.26 Initial publish
* 2011.02.22 Enable Kernel Crypto
*
*/
/* Constants for SEP (from vendor) */
#define SEP_START_MSG_TOKEN 0x02558808
#define SEP_DES_IV_SIZE_WORDS 2
#define SEP_DES_IV_SIZE_BYTES (SEP_DES_IV_SIZE_WORDS * \
sizeof(u32))
#define SEP_DES_KEY_SIZE_WORDS 2
#define SEP_DES_KEY_SIZE_BYTES (SEP_DES_KEY_SIZE_WORDS * \
sizeof(u32))
#define SEP_DES_BLOCK_SIZE 8
#define SEP_DES_DUMMY_SIZE 16
#define SEP_DES_INIT_OPCODE 0x10
#define SEP_DES_BLOCK_OPCODE 0x11
#define SEP_AES_BLOCK_SIZE_WORDS 4
#define SEP_AES_BLOCK_SIZE_BYTES \
(SEP_AES_BLOCK_SIZE_WORDS * sizeof(u32))
#define SEP_AES_DUMMY_BLOCK_SIZE 16
#define SEP_AES_IV_SIZE_WORDS SEP_AES_BLOCK_SIZE_WORDS
#define SEP_AES_IV_SIZE_BYTES \
(SEP_AES_IV_SIZE_WORDS * sizeof(u32))
#define SEP_AES_KEY_128_SIZE 16
#define SEP_AES_KEY_192_SIZE 24
#define SEP_AES_KEY_256_SIZE 32
#define SEP_AES_KEY_512_SIZE 64
#define SEP_AES_MAX_KEY_SIZE_WORDS 16
#define SEP_AES_MAX_KEY_SIZE_BYTES \
(SEP_AES_MAX_KEY_SIZE_WORDS * sizeof(u32))
#define SEP_AES_WRAP_MIN_SIZE 8
#define SEP_AES_WRAP_MAX_SIZE 0x10000000
#define SEP_AES_WRAP_BLOCK_SIZE_WORDS 2
#define SEP_AES_WRAP_BLOCK_SIZE_BYTES \
(SEP_AES_WRAP_BLOCK_SIZE_WORDS * sizeof(u32))
#define SEP_AES_SECRET_RKEK1 0x1
#define SEP_AES_SECRET_RKEK2 0x2
#define SEP_AES_INIT_OPCODE 0x2
#define SEP_AES_BLOCK_OPCODE 0x3
#define SEP_AES_FINISH_OPCODE 0x4
#define SEP_AES_WRAP_OPCODE 0x6
#define SEP_AES_UNWRAP_OPCODE 0x7
#define SEP_AES_XTS_FINISH_OPCODE 0x8
#define SEP_HASH_RESULT_SIZE_WORDS 16
#define SEP_MD5_DIGEST_SIZE_WORDS 4
#define SEP_MD5_DIGEST_SIZE_BYTES \
(SEP_MD5_DIGEST_SIZE_WORDS * sizeof(u32))
#define SEP_SHA1_DIGEST_SIZE_WORDS 5
#define SEP_SHA1_DIGEST_SIZE_BYTES \
(SEP_SHA1_DIGEST_SIZE_WORDS * sizeof(u32))
#define SEP_SHA224_DIGEST_SIZE_WORDS 7
#define SEP_SHA224_DIGEST_SIZE_BYTES \
(SEP_SHA224_DIGEST_SIZE_WORDS * sizeof(u32))
#define SEP_SHA256_DIGEST_SIZE_WORDS 8
#define SEP_SHA256_DIGEST_SIZE_BYTES \
(SEP_SHA256_DIGEST_SIZE_WORDS * sizeof(u32))
#define SEP_SHA384_DIGEST_SIZE_WORDS 12
#define SEP_SHA384_DIGEST_SIZE_BYTES \
(SEP_SHA384_DIGEST_SIZE_WORDS * sizeof(u32))
#define SEP_SHA512_DIGEST_SIZE_WORDS 16
#define SEP_SHA512_DIGEST_SIZE_BYTES \
(SEP_SHA512_DIGEST_SIZE_WORDS * sizeof(u32))
#define SEP_HASH_BLOCK_SIZE_WORDS 16
#define SEP_HASH_BLOCK_SIZE_BYTES \
(SEP_HASH_BLOCK_SIZE_WORDS * sizeof(u32))
#define SEP_SHA2_BLOCK_SIZE_WORDS 32
#define SEP_SHA2_BLOCK_SIZE_BYTES \
(SEP_SHA2_BLOCK_SIZE_WORDS * sizeof(u32))
#define SEP_HASH_INIT_OPCODE 0x20
#define SEP_HASH_UPDATE_OPCODE 0x21
#define SEP_HASH_FINISH_OPCODE 0x22
#define SEP_HASH_SINGLE_OPCODE 0x23
#define SEP_HOST_ERROR 0x0b000000
#define SEP_OK 0x0
#define SEP_INVALID_START (SEP_HOST_ERROR + 0x3)
#define SEP_WRONG_OPCODE (SEP_HOST_ERROR + 0x1)
#define SEP_TRANSACTION_WAIT_TIME 5
#define SEP_QUEUE_LENGTH 2
/* Macros */
#ifndef __LITTLE_ENDIAN
#define CHG_ENDIAN(val) \
(((val) >> 24) | \
(((val) & 0x00FF0000) >> 8) | \
(((val) & 0x0000FF00) << 8) | \
(((val) & 0x000000FF) << 24))
#else
#define CHG_ENDIAN(val) val
#endif
/* Enums for SEP (from vendor) */
enum des_numkey {
DES_KEY_1 = 1,
DES_KEY_2 = 2,
DES_KEY_3 = 3,
SEP_NUMKEY_OPTIONS,
SEP_NUMKEY_LAST = 0x7fffffff,
};
enum des_enc_mode {
SEP_DES_ENCRYPT = 0,
SEP_DES_DECRYPT = 1,
SEP_DES_ENC_OPTIONS,
SEP_DES_ENC_LAST = 0x7fffffff,
};
enum des_op_mode {
SEP_DES_ECB = 0,
SEP_DES_CBC = 1,
SEP_OP_OPTIONS,
SEP_OP_LAST = 0x7fffffff,
};
enum aes_keysize {
AES_128 = 0,
AES_192 = 1,
AES_256 = 2,
AES_512 = 3,
AES_SIZE_OPTIONS,
AEA_SIZE_LAST = 0x7FFFFFFF,
};
enum aes_enc_mode {
SEP_AES_ENCRYPT = 0,
SEP_AES_DECRYPT = 1,
SEP_AES_ENC_OPTIONS,
SEP_AES_ENC_LAST = 0x7FFFFFFF,
};
enum aes_op_mode {
SEP_AES_ECB = 0,
SEP_AES_CBC = 1,
SEP_AES_MAC = 2,
SEP_AES_CTR = 3,
SEP_AES_XCBC = 4,
SEP_AES_CMAC = 5,
SEP_AES_XTS = 6,
SEP_AES_OP_OPTIONS,
SEP_AES_OP_LAST = 0x7FFFFFFF,
};
enum hash_op_mode {
SEP_HASH_SHA1 = 0,
SEP_HASH_SHA224 = 1,
SEP_HASH_SHA256 = 2,
SEP_HASH_SHA384 = 3,
SEP_HASH_SHA512 = 4,
SEP_HASH_MD5 = 5,
SEP_HASH_OPTIONS,
SEP_HASH_LAST_MODE = 0x7FFFFFFF,
};
/* Structures for SEP (from vendor) */
struct sep_des_internal_key {
u32 key1[SEP_DES_KEY_SIZE_WORDS];
u32 key2[SEP_DES_KEY_SIZE_WORDS];
u32 key3[SEP_DES_KEY_SIZE_WORDS];
};
struct sep_des_internal_context {
u32 iv_context[SEP_DES_IV_SIZE_WORDS];
struct sep_des_internal_key context_key;
enum des_numkey nbr_keys;
enum des_enc_mode encryption;
enum des_op_mode operation;
u8 dummy_block[SEP_DES_DUMMY_SIZE];
};
struct sep_des_private_context {
u32 valid_tag;
u32 iv;
u8 ctx_buf[sizeof(struct sep_des_internal_context)];
};
/* This is the structure passed to SEP via msg area */
struct sep_des_key {
u32 key1[SEP_DES_KEY_SIZE_WORDS];
u32 key2[SEP_DES_KEY_SIZE_WORDS];
u32 key3[SEP_DES_KEY_SIZE_WORDS];
u32 pad[SEP_DES_KEY_SIZE_WORDS];
};
struct sep_aes_internal_context {
u32 aes_ctx_iv[SEP_AES_IV_SIZE_WORDS];
u32 aes_ctx_key[SEP_AES_MAX_KEY_SIZE_WORDS / 2];
enum aes_keysize keysize;
enum aes_enc_mode encmode;
enum aes_op_mode opmode;
u8 secret_key;
u32 no_add_blocks;
u32 last_block_size;
u32 last_block[SEP_AES_BLOCK_SIZE_WORDS];
u32 prev_iv[SEP_AES_BLOCK_SIZE_WORDS];
u32 remaining_size;
union {
struct {
u32 dkey1[SEP_AES_BLOCK_SIZE_WORDS];
u32 dkey2[SEP_AES_BLOCK_SIZE_WORDS];
u32 dkey3[SEP_AES_BLOCK_SIZE_WORDS];
} cmac_data;
struct {
u32 xts_key[SEP_AES_MAX_KEY_SIZE_WORDS / 2];
u32 temp1[SEP_AES_BLOCK_SIZE_WORDS];
u32 temp2[SEP_AES_BLOCK_SIZE_WORDS];
} xtx_data;
} s_data;
u8 dummy_block[SEP_AES_DUMMY_BLOCK_SIZE];
};
struct sep_aes_private_context {
u32 valid_tag;
u32 aes_iv;
u32 op_mode;
u8 cbuff[sizeof(struct sep_aes_internal_context)];
};
struct sep_hash_internal_context {
u32 hash_result[SEP_HASH_RESULT_SIZE_WORDS];
enum hash_op_mode hash_opmode;
u32 previous_data[SEP_SHA2_BLOCK_SIZE_WORDS];
u16 prev_update_bytes;
u32 total_proc_128bit[4];
u16 op_mode_block_size;
u8 dummy_aes_block[SEP_AES_DUMMY_BLOCK_SIZE];
};
struct sep_hash_private_context {
u32 valid_tag;
u32 iv;
u8 internal_context[sizeof(struct sep_hash_internal_context)];
};
union key_t {
struct sep_des_key des;
u32 aes[SEP_AES_MAX_KEY_SIZE_WORDS];
};
/* Context structures for crypto API */
/**
* Structure for this current task context
* This same structure is used for both hash
* and crypt in order to reduce duplicate code
* for stuff that is done for both hash operations
* and crypto operations. We cannot trust that the
* system context is not pulled out from under
* us during operation to operation, so all
* critical stuff such as data pointers must
* be in in a context that is exclusive for this
* particular task at hand.
*/
struct this_task_ctx {
struct sep_device *sep_used;
u32 done;
unsigned char iv[100];
enum des_enc_mode des_encmode;
enum des_op_mode des_opmode;
enum aes_enc_mode aes_encmode;
enum aes_op_mode aes_opmode;
u32 init_opcode;
u32 block_opcode;
size_t data_length;
size_t ivlen;
struct ablkcipher_walk walk;
int i_own_sep; /* Do I have custody of the sep? */
struct sep_call_status call_status;
struct build_dcb_struct_kernel dcb_input_data;
struct sep_dma_context *dma_ctx;
void *dmatables_region;
size_t nbytes;
struct sep_dcblock *dcb_region;
struct sep_queue_info *queue_elem;
int msg_len_words;
unsigned char msg[SEP_DRIVER_MESSAGE_SHARED_AREA_SIZE_IN_BYTES];
void *msgptr;
struct scatterlist *src_sg;
struct scatterlist *dst_sg;
struct scatterlist *src_sg_hold;
struct scatterlist *dst_sg_hold;
struct ahash_request *current_hash_req;
struct ablkcipher_request *current_cypher_req;
enum type_of_request current_request;
int digest_size_words;
int digest_size_bytes;
int block_size_words;
int block_size_bytes;
enum hash_op_mode hash_opmode;
enum hash_stage current_hash_stage;
/**
* Not that this is a pointer. The are_we_done_yet variable is
* allocated by the task function. This way, even if the kernel
* crypto infrastructure has grabbed the task structure out from
* under us, the task function can still see this variable.
*/
int *are_we_done_yet;
unsigned long end_time;
};
struct sep_system_ctx {
union key_t key;
size_t keylen;
int key_sent;
enum des_numkey des_nbr_keys;
enum aes_keysize aes_key_size;
unsigned long end_time;
struct sep_des_private_context des_private_ctx;
struct sep_aes_private_context aes_private_ctx;
struct sep_hash_private_context hash_private_ctx;
};
/* work queue structures */
struct sep_work_struct {
struct work_struct work;
void (*callback)(void *);
void *data;
};
/* Functions */
int sep_crypto_setup(void);
void sep_crypto_takedown(void);
#ifndef __SEP_DEV_H__
#define __SEP_DEV_H__
/*
*
* sep_dev.h - Security Processor Device Structures
*
* Copyright(c) 2009-2011 Intel Corporation. All rights reserved.
* Contributions(c) 2009-2011 Discretix. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59
* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
* CONTACTS:
*
* Mark Allyn mark.a.allyn@intel.com
* Jayant Mangalampalli jayant.mangalampalli@intel.com
*
* CHANGES
* 2010.09.14 upgrade to Medfield
* 2011.02.22 enable kernel crypto
*/
struct sep_device {
/* pointer to pci dev */
struct pci_dev *pdev;
/* character device file */
struct cdev sep_cdev;
/* devices (using misc dev) */
struct miscdevice miscdev_sep;
/* major / minor numbers of device */
dev_t sep_devno;
/* guards command sent counter */
spinlock_t snd_rply_lck;
/* guards driver memory usage in fastcall if */
struct semaphore sep_doublebuf;
/* flags to indicate use and lock status of sep */
u32 pid_doing_transaction;
unsigned long in_use_flags;
/* address of the shared memory allocated during init for SEP driver
(coherent alloc) */
dma_addr_t shared_bus;
size_t shared_size;
void *shared_addr;
/* start address of the access to the SEP registers from driver */
dma_addr_t reg_physical_addr;
dma_addr_t reg_physical_end;
void __iomem *reg_addr;
/* wait queue heads of the driver */
wait_queue_head_t event_interrupt;
wait_queue_head_t event_transactions;
struct list_head sep_queue_status;
u32 sep_queue_num;
spinlock_t sep_queue_lock;
/* Is this in use? */
u32 in_use;
/* indicates whether power save is set up */
u32 power_save_setup;
/* Power state */
u32 power_state;
/* transaction counter that coordinates the
transactions between SEP and HOST */
unsigned long send_ct;
/* counter for the messages from sep */
unsigned long reply_ct;
/* The following are used for kernel crypto client requests */
u32 in_kernel; /* Set for kernel client request */
struct tasklet_struct finish_tasklet;
enum type_of_request current_request;
enum hash_stage current_hash_stage;
struct ahash_request *current_hash_req;
struct ablkcipher_request *current_cypher_req;
struct this_task_ctx *ta_ctx;
struct workqueue_struct *workqueue;
};
extern struct sep_device *sep_dev;
/**
* SEP message header for a transaction
* @reserved: reserved memory (two words)
* @token: SEP message token
* @msg_len: message length
* @opcpde: message opcode
*/
struct sep_msgarea_hdr {
u32 reserved[2];
u32 token;
u32 msg_len;
u32 opcode;
};
/**
* sep_queue_data - data to be maintained in status queue for a transaction
* @opcode : transaction opcode
* @size : message size
* @pid: owner process
* @name: owner process name
*/
struct sep_queue_data {
u32 opcode;
u32 size;
s32 pid;
u8 name[TASK_COMM_LEN];
};
/** sep_queue_info - maintains status info of all transactions
* @list: head of list
* @sep_queue_data : data for transaction
*/
struct sep_queue_info {
struct list_head list;
struct sep_queue_data data;
};
static inline void sep_write_reg(struct sep_device *dev, int reg, u32 value)
{
void __iomem *addr = dev->reg_addr + reg;
writel(value, addr);
}
static inline u32 sep_read_reg(struct sep_device *dev, int reg)
{
void __iomem *addr = dev->reg_addr + reg;
return readl(addr);
}
/* wait for SRAM write complete(indirect write */
static inline void sep_wait_sram_write(struct sep_device *dev)
{
u32 reg_val;
do {
reg_val = sep_read_reg(dev, HW_SRAM_DATA_READY_REG_ADDR);
} while (!(reg_val & 1));
}
#endif
/*
*
* sep_driver_api.h - Security Processor Driver api definitions
*
* Copyright(c) 2009-2011 Intel Corporation. All rights reserved.
* Contributions(c) 2009-2011 Discretix. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59
* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
* CONTACTS:
*
* Mark Allyn mark.a.allyn@intel.com
* Jayant Mangalampalli jayant.mangalampalli@intel.com
*
* CHANGES:
*
* 2010.09.14 Upgrade to Medfield
* 2011.02.22 Enable kernel crypto
*
*/
#ifndef __SEP_DRIVER_API_H__
#define __SEP_DRIVER_API_H__
/* Type of request from device */
#define SEP_DRIVER_SRC_REPLY 1
#define SEP_DRIVER_SRC_REQ 2
#define SEP_DRIVER_SRC_PRINTF 3
/* Power state */
#define SEP_DRIVER_POWERON 1
#define SEP_DRIVER_POWEROFF 2
/* Following enums are used only for kernel crypto api */
enum type_of_request {
NO_REQUEST,
AES_CBC,
AES_ECB,
DES_CBC,
DES_ECB,
DES3_ECB,
DES3_CBC,
SHA1,
MD5,
SHA224,
SHA256
};
enum hash_stage {
HASH_INIT,
HASH_UPDATE,
HASH_FINISH,
HASH_DIGEST,
HASH_FINUP_DATA,
HASH_FINUP_FINISH
};
/*
structure that represents DCB
*/
struct sep_dcblock {
/* physical address of the first input mlli */
u32 input_mlli_address;
/* num of entries in the first input mlli */
u32 input_mlli_num_entries;
/* size of data in the first input mlli */
u32 input_mlli_data_size;
/* physical address of the first output mlli */
u32 output_mlli_address;
/* num of entries in the first output mlli */
u32 output_mlli_num_entries;
/* size of data in the first output mlli */
u32 output_mlli_data_size;
/* pointer to the output virtual tail */
aligned_u64 out_vr_tail_pt;
/* size of tail data */
u32 tail_data_size;
/* input tail data array */
u8 tail_data[68];
};
/*
command structure for building dcb block (currently for ext app only)
*/
struct build_dcb_struct {
/* address value of the data in */
aligned_u64 app_in_address;
/* size of data in */
u32 data_in_size;
/* address of the data out */
aligned_u64 app_out_address;
/* the size of the block of the operation - if needed,
every table will be modulo this parameter */
u32 block_size;
/* the size of the block of the operation - if needed,
every table will be modulo this parameter */
u32 tail_block_size;
/* which application calls the driver DX or applet */
u32 is_applet;
};
/*
command structure for building dcb block for kernel crypto
*/
struct build_dcb_struct_kernel {
/* address value of the data in */
void *app_in_address;
/* size of data in */
ssize_t data_in_size;
/* address of the data out */
void *app_out_address;
/* the size of the block of the operation - if needed,
every table will be modulo this parameter */
u32 block_size;
/* the size of the block of the operation - if needed,
every table will be modulo this parameter */
u32 tail_block_size;
/* which application calls the driver DX or applet */
u32 is_applet;
struct scatterlist *src_sg;
struct scatterlist *dst_sg;
};
/**
* @struct sep_dma_map
*
* Structure that contains all information needed for mapping the user pages
* or kernel buffers for dma operations
*
*
*/
struct sep_dma_map {
/* mapped dma address */
dma_addr_t dma_addr;
/* size of the mapped data */
size_t size;
};
struct sep_dma_resource {
/* array of pointers to the pages that represent
input data for the synchronic DMA action */
struct page **in_page_array;
/* array of pointers to the pages that represent out
data for the synchronic DMA action */
struct page **out_page_array;
/* number of pages in the sep_in_page_array */
u32 in_num_pages;
/* number of pages in the sep_out_page_array */
u32 out_num_pages;
/* map array of the input data */
struct sep_dma_map *in_map_array;
/* map array of the output data */
struct sep_dma_map *out_map_array;
/* number of entries of the input mapp array */
u32 in_map_num_entries;
/* number of entries of the output mapp array */
u32 out_map_num_entries;
/* Scatter list for kernel operations */
struct scatterlist *src_sg;
struct scatterlist *dst_sg;
};
/* command struct for translating rar handle to bus address
and setting it at predefined location */
struct rar_hndl_to_bus_struct {
/* rar handle */
aligned_u64 rar_handle;
};
/*
structure that represent one entry in the DMA LLI table
*/
struct sep_lli_entry {
/* physical address */
u32 bus_address;
/* block size */
u32 block_size;
};
/*
* header format for each fastcall write operation
*/
struct sep_fastcall_hdr {
u32 magic;
u32 secure_dma;
u32 msg_len;
u32 num_dcbs;
};
/*
* structure used in file pointer's private data field
* to track the status of the calls to the various
* driver interface
*/
struct sep_call_status {
unsigned long status;
};
/*
* format of dma context buffer used to store all DMA-related
* context information of a particular transaction
*/
struct sep_dma_context {
/* number of data control blocks */
u32 nr_dcb_creat;
/* number of the lli tables created in the current transaction */
u32 num_lli_tables_created;
/* size of currently allocated dma tables region */
u32 dmatables_len;
/* size of input data */
u32 input_data_len;
/* secure dma use (for imr memory restricted area in output) */
bool secure_dma;
struct sep_dma_resource dma_res_arr[SEP_MAX_NUM_SYNC_DMA_OPS];
/* Scatter gather for kernel crypto */
struct scatterlist *src_sg;
struct scatterlist *dst_sg;
};
/*
* format for file pointer's private_data field
*/
struct sep_private_data {
struct sep_queue_info *my_queue_elem;
struct sep_device *device;
struct sep_call_status call_status;
struct sep_dma_context *dma_ctx;
};
/* Functions used by sep_crypto */
/**
* sep_queue_status_remove - Removes transaction from status queue
* @sep: SEP device
* @sep_queue_info: pointer to status queue
*
* This function will removes information about transaction from the queue.
*/
void sep_queue_status_remove(struct sep_device *sep,
struct sep_queue_info **queue_elem);
/**
* sep_queue_status_add - Adds transaction to status queue
* @sep: SEP device
* @opcode: transaction opcode
* @size: input data size
* @pid: pid of current process
* @name: current process name
* @name_len: length of name (current process)
*
* This function adds information about about transaction started to the status
* queue.
*/
struct sep_queue_info *sep_queue_status_add(
struct sep_device *sep,
u32 opcode,
u32 size,
u32 pid,
u8 *name, size_t name_len);
/**
* sep_create_dcb_dmatables_context_kernel - Creates DCB & MLLI/DMA table context
* for kernel crypto
* @sep: SEP device
* @dcb_region: DCB region buf to create for current transaction
* @dmatables_region: MLLI/DMA tables buf to create for current transaction
* @dma_ctx: DMA context buf to create for current transaction
* @user_dcb_args: User arguments for DCB/MLLI creation
* @num_dcbs: Number of DCBs to create
*/
int sep_create_dcb_dmatables_context_kernel(struct sep_device *sep,
struct sep_dcblock **dcb_region,
void **dmatables_region,
struct sep_dma_context **dma_ctx,
const struct build_dcb_struct_kernel *dcb_data,
const u32 num_dcbs);
/**
* sep_activate_dcb_dmatables_context - Takes DCB & DMA tables
* contexts into use
* @sep: SEP device
* @dcb_region: DCB region copy
* @dmatables_region: MLLI/DMA tables copy
* @dma_ctx: DMA context for current transaction
*/
ssize_t sep_activate_dcb_dmatables_context(struct sep_device *sep,
struct sep_dcblock **dcb_region,
void **dmatables_region,
struct sep_dma_context *dma_ctx);
/**
* sep_prepare_input_output_dma_table_in_dcb - prepare control blocks
* @app_in_address: unsigned long; for data buffer in (user space)
* @app_out_address: unsigned long; for data buffer out (user space)
* @data_in_size: u32; for size of data
* @block_size: u32; for block size
* @tail_block_size: u32; for size of tail block
* @isapplet: bool; to indicate external app
* @is_kva: bool; kernel buffer; only used for kernel crypto module
* @secure_dma; indicates whether this is secure_dma using IMR
*
* This function prepares the linked DMA tables and puts the
* address for the linked list of tables inta a DCB (data control
* block) the address of which is known by the SEP hardware
* Note that all bus addresses that are passed to the SEP
* are in 32 bit format; the SEP is a 32 bit device
*/
int sep_prepare_input_output_dma_table_in_dcb(struct sep_device *sep,
unsigned long app_in_address,
unsigned long app_out_address,
u32 data_in_size,
u32 block_size,
u32 tail_block_size,
bool isapplet,
bool is_kva,
bool secure_dma,
struct sep_dcblock *dcb_region,
void **dmatables_region,
struct sep_dma_context **dma_ctx,
struct scatterlist *src_sg,
struct scatterlist *dst_sg);
/**
* sep_free_dma_table_data_handler - free DMA table
* @sep: pointer to struct sep_device
* @dma_ctx: dma context
*
* Handles the request to free DMA table for synchronic actions
*/
int sep_free_dma_table_data_handler(struct sep_device *sep,
struct sep_dma_context **dma_ctx);
/**
* sep_send_command_handler - kick off a command
* @sep: SEP being signalled
*
* This function raises interrupt to SEP that signals that is has a new
* command from the host
*
* Note that this function does fall under the ioctl lock
*/
int sep_send_command_handler(struct sep_device *sep);
/**
* sep_wait_transaction - Used for synchronizing transactions
* @sep: SEP device
*/
int sep_wait_transaction(struct sep_device *sep);
/**
* IOCTL command defines
*/
/* magic number 1 of the sep IOCTL command */
#define SEP_IOC_MAGIC_NUMBER 's'
/* sends interrupt to sep that message is ready */
#define SEP_IOCSENDSEPCOMMAND \
_IO(SEP_IOC_MAGIC_NUMBER, 0)
/* end transaction command */
#define SEP_IOCENDTRANSACTION \
_IO(SEP_IOC_MAGIC_NUMBER, 15)
#define SEP_IOCPREPAREDCB \
_IOW(SEP_IOC_MAGIC_NUMBER, 35, struct build_dcb_struct)
#define SEP_IOCFREEDCB \
_IO(SEP_IOC_MAGIC_NUMBER, 36)
struct sep_device;
#define SEP_IOCPREPAREDCB_SECURE_DMA \
_IOW(SEP_IOC_MAGIC_NUMBER, 38, struct build_dcb_struct)
#define SEP_IOCFREEDCB_SECURE_DMA \
_IO(SEP_IOC_MAGIC_NUMBER, 39)
#endif
此差异已折叠。
/*
*
* sep_driver_hw_defs.h - Security Processor Driver hardware definitions
*
* Copyright(c) 2009-2011 Intel Corporation. All rights reserved.
* Contributions(c) 2009-2011 Discretix. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59
* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
* CONTACTS:
*
* Mark Allyn mark.a.allyn@intel.com
* Jayant Mangalampalli jayant.mangalampalli@intel.com
*
* CHANGES:
*
* 2010.09.20 Upgrade to Medfield
* 2011.02.22 Enable kernel crypto
*
*/
#ifndef SEP_DRIVER_HW_DEFS__H
#define SEP_DRIVER_HW_DEFS__H
/*----------------------- */
/* HW Registers Defines. */
/* */
/*---------------------- -*/
/* cf registers */
#define HW_HOST_IRR_REG_ADDR 0x0A00UL
#define HW_HOST_IMR_REG_ADDR 0x0A04UL
#define HW_HOST_ICR_REG_ADDR 0x0A08UL
#define HW_HOST_SEP_HOST_GPR0_REG_ADDR 0x0B00UL
#define HW_HOST_SEP_HOST_GPR1_REG_ADDR 0x0B04UL
#define HW_HOST_SEP_HOST_GPR2_REG_ADDR 0x0B08UL
#define HW_HOST_SEP_HOST_GPR3_REG_ADDR 0x0B0CUL
#define HW_HOST_HOST_SEP_GPR0_REG_ADDR 0x0B80UL
#define HW_HOST_HOST_SEP_GPR1_REG_ADDR 0x0B84UL
#define HW_HOST_HOST_SEP_GPR2_REG_ADDR 0x0B88UL
#define HW_HOST_HOST_SEP_GPR3_REG_ADDR 0x0B8CUL
#define HW_SRAM_DATA_READY_REG_ADDR 0x0F08UL
#endif /* ifndef HW_DEFS */
此差异已折叠。
此差异已折叠。
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