提交 b39fc890 编写于 作者: A Antonio Ospite 提交者: Jiri Kosina

mfd: fix comment

Signed-off-by: NAntonio Ospite <ao2@ao2.it>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>
上级 2fba5376
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
/* /*
* MSIC interrupt tree is readable from SRAM at INTEL_MSIC_IRQ_PHYS_BASE. * MSIC interrupt tree is readable from SRAM at INTEL_MSIC_IRQ_PHYS_BASE.
* Since IRQ block starts from address 0x002 we need to substract that from * Since IRQ block starts from address 0x002 we need to subtract that from
* the actual IRQ status register address. * the actual IRQ status register address.
*/ */
#define MSIC_IRQ_STATUS(x) (INTEL_MSIC_IRQ_PHYS_BASE + ((x) - 2)) #define MSIC_IRQ_STATUS(x) (INTEL_MSIC_IRQ_PHYS_BASE + ((x) - 2))
......
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