提交 b0a88ae5 编写于 作者: J Jeffrey Deans 提交者: Ralf Baechle

MIPS: GIC: Remove GIC_FLAG_IPI

irq-gic.c:gic_get_int() masks out interrupts from the pending set which
aren’t in the pcpu_mask. Only interrupts marked with GIC_FLAG_IPI were
set in pcpu_mask, meaning that peripheral interrupts also had to be
marked as IPIs. Remove the use of GIC_FLAG_IPI and allow the flags
member of struct gic_intr_map to be zero.
Signed-off-by: NJeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7374/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 c9750481
......@@ -317,8 +317,7 @@ struct gic_intr_map {
unsigned int polarity; /* Polarity : +/- */
unsigned int trigtype; /* Trigger : Edge/Levl */
unsigned int flags; /* Misc flags */
#define GIC_FLAG_IPI 0x01
#define GIC_FLAG_TRANSPARENT 0x02
#define GIC_FLAG_TRANSPARENT 0x01
};
/*
......
......@@ -311,9 +311,10 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
/* Init Intr Masks */
GIC_CLR_INTR_MASK(intr);
/* Initialise per-cpu Interrupt software masks */
if (flags & GIC_FLAG_IPI)
set_bit(intr, pcpu_masks[cpu].pcpu_mask);
set_bit(intr, pcpu_masks[cpu].pcpu_mask);
if ((flags & GIC_FLAG_TRANSPARENT) && (cpu_has_veic == 0))
GIC_SET_INTR_MASK(intr);
if (trigtype == GIC_TRIG_EDGE)
......@@ -352,8 +353,6 @@ static void __init gic_basic_init(int numintrs, int numvpes,
cpu = intrmap[i].cpunum;
if (cpu == GIC_UNUSED)
continue;
if (cpu == 0 && i != 0 && intrmap[i].flags == 0)
continue;
gic_setup_intr(i,
intrmap[i].cpunum,
intrmap[i].pin + pin_offset,
......
......@@ -427,7 +427,7 @@ static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin)
gic_intr_map[intr].pin = cpupin;
gic_intr_map[intr].polarity = GIC_POL_POS;
gic_intr_map[intr].trigtype = GIC_TRIG_EDGE;
gic_intr_map[intr].flags = GIC_FLAG_IPI;
gic_intr_map[intr].flags = 0;
ipi_map[cpu] |= (1 << (cpupin + 2));
}
......
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