ASoC: register cache should be 1 byte aligned for 1 byte long register
Signed-off-by: NCliff Cai <cliff.cai@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
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