提交 a9fe468f 编写于 作者: T Thierry Reding

ARM: tegra: Add memory controller support for Tegra30

Collapses the old memory-controller and IOMMU device tree nodes into a
single node to more accurately describe the hardware.

While this is an incompatible change there are no users of the IOMMU on
Tegra, even though a driver has existed for some time.
Signed-off-by: NThierry Reding <treding@nvidia.com>
上级 49727d30
......@@ -623,23 +623,15 @@
clock-names = "pclk", "clk32k_in";
};
memory-controller@7000f000 {
mc: memory-controller@7000f000 {
compatible = "nvidia,tegra30-mc";
reg = <0x7000f000 0x010
0x7000f03c 0x1b4
0x7000f200 0x028
0x7000f284 0x17c>;
reg = <0x7000f000 0x400>;
clocks = <&tegra_car TEGRA30_CLK_MC>;
clock-names = "mc";
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
iommu@7000f010 {
compatible = "nvidia,tegra30-smmu";
reg = <0x7000f010 0x02c
0x7000f1f0 0x010
0x7000f228 0x05c>;
nvidia,#asids = <4>; /* # of ASIDs */
dma-window = <0 0x40000000>; /* IOVA start & length */
nvidia,ahb = <&ahb>;
#iommu-cells = <1>;
};
fuse@7000f800 {
......
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