提交 9d6d736b 编写于 作者: P Peter Griffin 提交者: Maxime Coquelin

ARM: DT: STiH407: Add RMII pinctrl support

This patch adds the RMII pinctrl support for the Synopsys
MAC on STiH407 SoCs.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NPatrice Chotard <patrice.chotard@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
上级 0252d863
......@@ -256,6 +256,33 @@
phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
};
};
pinctrl_rmii1: rmii1-0 {
st,pins {
txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
mdint = <&pio1 3 ALT1 IN BYPASS 0>;
rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_B>;
rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_B>;
rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_B>;
rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
};
};
pinctrl_rmii1_phyclk: rmii1_phyclk {
st,pins {
phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
};
};
pinctrl_rmii1_phyclk_ext: rmii1_phyclk_ext {
st,pins {
phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
};
};
};
pwm1 {
......
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