提交 98227a90 编写于 作者: D Daniel Drake 提交者: John W. Linville

[PATCH] zd1211rw: Match vendor driver IFS values

The vendor driver resets the IFS value every time the channel changes,
to this one.
Signed-off-by: NDaniel Drake <dsd@gentoo.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 fe7215ca
......@@ -807,7 +807,6 @@ static int zd1211_hw_init_hmac(struct zd_chip *chip)
{ CR_ACK_TIMEOUT_EXT, 0x80 },
{ CR_ADDA_PWR_DWN, 0x00 },
{ CR_ACK_TIME_80211, 0x100 },
{ CR_IFS_VALUE, 0x547c032 },
{ CR_RX_PE_DELAY, 0x70 },
{ CR_PS_CTRL, 0x10000000 },
{ CR_RTS_CTS_RATE, 0x02030203 },
......@@ -854,7 +853,6 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
{ CR_ACK_TIMEOUT_EXT, 0x80 },
{ CR_ADDA_PWR_DWN, 0x00 },
{ CR_ACK_TIME_80211, 0x100 },
{ CR_IFS_VALUE, 0x547c032 },
{ CR_RX_PE_DELAY, 0x70 },
{ CR_PS_CTRL, 0x10000000 },
{ CR_RTS_CTS_RATE, 0x02030203 },
......@@ -970,10 +968,15 @@ static int hw_init(struct zd_chip *chip)
r = hw_init_hmac(chip);
if (r)
return r;
r = set_beacon_interval(chip, 100);
/* Although the vendor driver defaults to a different value during
* init, it overwrites the IFS value with the following every time
* the channel changes. We should aim to be more intelligent... */
r = zd_iowrite32_locked(chip, IFS_VALUE_DEFAULT, CR_IFS_VALUE);
if (r)
return r;
return 0;
return set_beacon_interval(chip, 100);
}
#ifdef DEBUG
......
......@@ -473,7 +473,15 @@
#define CR_ACK_TIMEOUT_EXT CTL_REG(0x0690)
#define CR_BCN_FIFO_SEMAPHORE CTL_REG(0x0694)
#define CR_IFS_VALUE CTL_REG(0x0698)
#define IFS_VALUE_DIFS_SH 0
#define IFS_VALUE_EIFS_SH 12
#define IFS_VALUE_SIFS_SH 24
#define IFS_VALUE_DEFAULT (( 50 << IFS_VALUE_DIFS_SH) | \
(1148 << IFS_VALUE_EIFS_SH) | \
( 10 << IFS_VALUE_SIFS_SH))
#define CR_RX_TIME_OUT CTL_REG(0x069C)
#define CR_TOTAL_RX_FRM CTL_REG(0x06A0)
#define CR_CRC32_CNT CTL_REG(0x06A4)
......
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