提交 955c1dd1 编写于 作者: J Jani Nikula 提交者: Zhenyu Wang

drm/i915/gvt: drop checks for early Skylake revisions

We no longer cater for pre-production revisions of Skylake.

Fixes: d4362225 ("drm/i915/gvt: update misc ctl regs base on stepping info")
Cc: Ping Gao <ping.a.gao@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
上级 0aaee4cc
......@@ -1279,14 +1279,12 @@ static int skl_misc_ctl_write(struct intel_vgpu *vgpu, unsigned int offset,
case 0x4ddc:
vgpu_vreg(vgpu, offset) = 0x8000003c;
/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl */
if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER))
I915_WRITE(reg, vgpu_vreg(vgpu, offset));
I915_WRITE(reg, vgpu_vreg(vgpu, offset));
break;
case 0x42080:
vgpu_vreg(vgpu, offset) = 0x8000;
/* WaCompressedResourceDisplayNewHashMode:skl */
if (IS_SKL_REVID(dev_priv, SKL_REVID_E0, REVID_FOREVER))
I915_WRITE(reg, vgpu_vreg(vgpu, offset));
I915_WRITE(reg, vgpu_vreg(vgpu, offset));
break;
default:
return -EINVAL;
......
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