ACPI / APD: Add clock frequency for Hisilicon Hip08 SPI controller

mainline inclusion
from linux-next
commit: 56131d6d8638b7cb6feee67a8794b3dfa626396e
category: feature (SPI ACPI for Hi1620)
bugzilla: 5443
CVE: NA

TPM chip on D06 is SPI based, so we need to add SPI ACPI support
for Hi1620.

Two patches already merged for 4.21, but the core support for spi
has another patchset needs lots of refactor, so just use the patch
from Fang Jian to enable this feature on 4.19

[PATCH 1/4] spi: dw-mmio: add ACPI support
[PATCH 2/4] ACPI / APD: Add clock frequency for Hisilicon Hip08 SPI controller
[PATCH 3/4] spi: add ACPI support for SPI controller chip select lines(cs-gpios)
[PATCH 4/4] hulk_defconfig: ensble SPI designware driver for Hi1620
--------------------------------------------------

The SPI clock frequency of Designware IP for Hisilicon Hip08 is 250M.

The ACPI ID used is "HISI0173".
Signed-off-by: NJay Fang <f.fangjian@huawei.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: NHanjun Guo <guohanjun@huawei.com>
Reviewed-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/acpi/acpi_apd.c

@@ -166,6 +166,11 @@ static const struct apd_device_desc thunderx2_i2c_desc = {
 	.setup = acpi_apd_setup,
 	.fixed_clk_rate = 125000000,
 };
+
+static const struct apd_device_desc hip08_spi_desc = {
+	.setup = acpi_apd_setup,
+	.fixed_clk_rate = 250000000,
+};
 #endif
 
 #else
@@ -234,6 +239,7 @@ static const struct acpi_device_id acpi_apd_device_ids[] = {
 	{ "CAV9007",  APD_ADDR(thunderx2_i2c_desc) },
 	{ "HISI02A1", APD_ADDR(hip07_i2c_desc) },
 	{ "HISI02A2", APD_ADDR(hip08_i2c_desc) },
+	{ "HISI0173", APD_ADDR(hip08_spi_desc) },
 #endif
 	{ }
 };