提交 8e15a0e3 编写于 作者: C Chris Dearman 提交者: Ralf Baechle

[MIPS] Count timer interrupts correctly.

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 2fae3731
......@@ -822,7 +822,7 @@ void ipi_decode(struct smtc_ipi *pipi)
switch (type_copy) {
case SMTC_CLOCK_TICK:
irq_enter();
kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++;
kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++;
/* Invoke Clock "Interrupt" */
ipi_timer_latch[dest_copy] = 0;
#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
......
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