提交 8df06e50 编写于 作者: J Jeff Kirsher 提交者: root

e1000: Fix RSS if enabled in mid-connection

Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NJohn Ronciak <john.ronciak@intel.com>
上级 497fce5e
......@@ -4755,8 +4755,36 @@ e1000_rar_set(struct e1000_hw *hw,
rar_low = ((uint32_t) addr[0] |
((uint32_t) addr[1] << 8) |
((uint32_t) addr[2] << 16) | ((uint32_t) addr[3] << 24));
rar_high = ((uint32_t) addr[4] | ((uint32_t) addr[5] << 8));
rar_high = ((uint32_t) addr[4] | ((uint32_t) addr[5] << 8) | E1000_RAH_AV);
/* Disable Rx and flush all Rx frames before enabling RSS to avoid Rx
* unit hang.
*
* Description:
* If there are any Rx frames queued up or otherwise present in the HW
* before RSS is enabled, and then we enable RSS, the HW Rx unit will
* hang. To work around this issue, we have to disable receives and
* flush out all Rx frames before we enable RSS. To do so, we modify we
* redirect all Rx traffic to manageability and then reset the HW.
* This flushes away Rx frames, and (since the redirections to
* manageability persists across resets) keeps new ones from coming in
* while we work. Then, we clear the Address Valid AV bit for all MAC
* addresses and undo the re-direction to manageability.
* Now, frames are coming in again, but the MAC won't accept them, so
* far so good. We now proceed to initialize RSS (if necessary) and
* configure the Rx unit. Last, we re-enable the AV bits and continue
* on our merry way.
*/
switch (hw->mac_type) {
case e1000_82571:
case e1000_82572:
if (hw->leave_av_bit_off == TRUE)
break;
default:
/* Indicate to hardware the Address is Valid. */
rar_high |= E1000_RAH_AV;
break;
}
E1000_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
E1000_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
......
......@@ -1361,6 +1361,7 @@ struct e1000_hw {
boolean_t ifs_params_forced;
boolean_t in_ifs_mode;
boolean_t mng_reg_access_disabled;
boolean_t leave_av_bit_off;
};
......
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