提交 8dddc3bd 编写于 作者: M Maya Nakamura 提交者: Xie XiuQi

PCI: hv: Replace hv_vp_set with hv_vpset

mainline inclusion
from mainline-5.0
commit 9bc1174280dd
category: bugfix
bugzilla: 12122
CVE: NA

-------------------------------------------------

Remove a duplicate definition of VP set (hv_vp_set) and use the common
definition (hv_vpset) that is used in other places.

Change the order of the members in struct hv_pcibus_device so that the
declaration of retarget_msi_interrupt_params is the last member. Struct
hv_vpset, which contains a flexible array, is nested two levels deep in
struct hv_pcibus_device via retarget_msi_interrupt_params.

Add a comment that retarget_msi_interrupt_params should be the last
member of struct hv_pcibus_device.
Signed-off-by: NMaya Nakamura <m.maya.nakamura@gmail.com>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: NMichael Kelley <mikelley@microsoft.com>
Reviewed-by: NVitaly Kuznetsov <vkuznets@redhat.com>
Tested-by: NVitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: NXiongfeng Wang <wangxiongfeng2@huawei.com>
Reviewed-by: NYao Hongbo <yaohongbo@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 b0b94abc
...@@ -393,12 +393,6 @@ struct hv_interrupt_entry { ...@@ -393,12 +393,6 @@ struct hv_interrupt_entry {
#define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */ #define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */
struct hv_vp_set {
u64 format; /* 0 (HvGenericSetSparse4k) */
u64 valid_banks;
u64 masks[HV_VP_SET_BANK_COUNT_MAX];
};
/* /*
* flags for hv_device_interrupt_target.flags * flags for hv_device_interrupt_target.flags
*/ */
...@@ -410,7 +404,7 @@ struct hv_device_interrupt_target { ...@@ -410,7 +404,7 @@ struct hv_device_interrupt_target {
u32 flags; u32 flags;
union { union {
u64 vp_mask; u64 vp_mask;
struct hv_vp_set vp_set; struct hv_vpset vp_set;
}; };
}; };
...@@ -460,12 +454,16 @@ struct hv_pcibus_device { ...@@ -460,12 +454,16 @@ struct hv_pcibus_device {
struct msi_controller msi_chip; struct msi_controller msi_chip;
struct irq_domain *irq_domain; struct irq_domain *irq_domain;
/* hypercall arg, must not cross page boundary */
struct retarget_msi_interrupt retarget_msi_interrupt_params;
spinlock_t retarget_msi_interrupt_lock; spinlock_t retarget_msi_interrupt_lock;
struct workqueue_struct *wq; struct workqueue_struct *wq;
/* hypercall arg, must not cross page boundary */
struct retarget_msi_interrupt retarget_msi_interrupt_params;
/*
* Don't put anything here: retarget_msi_interrupt_params must be last
*/
}; };
/* /*
...@@ -955,12 +953,13 @@ static void hv_irq_unmask(struct irq_data *data) ...@@ -955,12 +953,13 @@ static void hv_irq_unmask(struct irq_data *data)
*/ */
params->int_target.flags |= params->int_target.flags |=
HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET; HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
params->int_target.vp_set.valid_banks = params->int_target.vp_set.valid_bank_mask =
(1ull << HV_VP_SET_BANK_COUNT_MAX) - 1; (1ull << HV_VP_SET_BANK_COUNT_MAX) - 1;
/* /*
* var-sized hypercall, var-size starts after vp_mask (thus * var-sized hypercall, var-size starts after vp_mask (thus
* vp_set.format does not count, but vp_set.valid_banks does). * vp_set.format does not count, but vp_set.valid_bank_mask
* does).
*/ */
var_size = 1 + HV_VP_SET_BANK_COUNT_MAX; var_size = 1 + HV_VP_SET_BANK_COUNT_MAX;
...@@ -974,7 +973,7 @@ static void hv_irq_unmask(struct irq_data *data) ...@@ -974,7 +973,7 @@ static void hv_irq_unmask(struct irq_data *data)
goto exit_unlock; goto exit_unlock;
} }
params->int_target.vp_set.masks[cpu_vmbus / 64] |= params->int_target.vp_set.bank_contents[cpu_vmbus / 64] |=
(1ULL << (cpu_vmbus & 63)); (1ULL << (cpu_vmbus & 63));
} }
} else { } else {
......
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