提交 8cd42e97 编写于 作者: K Kumar Gala 提交者: Greg Kroah-Hartman

[PATCH] USB: EHCI and Freescale 83xx quirk

On the MPC834x processors the multiport host (MPH) EHCI controller has an
erratum in which the port number in the queue head expects to be 0..N-1
instead of 1..N.  If we are on one of these chips we subtract one from
the port number before putting it into the queue head.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 80cb9aee
...@@ -198,6 +198,16 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd) ...@@ -198,6 +198,16 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->operating_mode == FSL_USB2_MPH_HOST) { if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
unsigned int chip, rev, svr;
svr = mfspr(SPRN_SVR);
chip = svr >> 16;
rev = (svr >> 4) & 0xf;
/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
ehci->has_fsl_port_bug = 1;
if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->port_enables & FSL_USB2_PORT1_ENABLED) if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
......
...@@ -721,7 +721,14 @@ qh_make ( ...@@ -721,7 +721,14 @@ qh_make (
info1 |= maxp << 16; info1 |= maxp << 16;
info2 |= (EHCI_TUNE_MULT_TT << 30); info2 |= (EHCI_TUNE_MULT_TT << 30);
info2 |= urb->dev->ttport << 23;
/* Some Freescale processors have an erratum in which the
* port number in the queue head was 0..N-1 instead of 1..N.
*/
if (ehci_has_fsl_portno_bug(ehci))
info2 |= (urb->dev->ttport-1) << 23;
else
info2 |= urb->dev->ttport << 23;
/* set the address of the TT; for TDI's integrated /* set the address of the TT; for TDI's integrated
* root hub tt, leave it zeroed. * root hub tt, leave it zeroed.
......
...@@ -88,8 +88,11 @@ struct ehci_hcd { /* one per controller */ ...@@ -88,8 +88,11 @@ struct ehci_hcd { /* one per controller */
unsigned long next_statechange; unsigned long next_statechange;
u32 command; u32 command;
/* SILICON QUIRKS */
unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */ unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */
unsigned no_selective_suspend:1; unsigned no_selective_suspend:1;
unsigned has_fsl_port_bug:1; /* FreeScale */
u8 sbrn; /* packed release number */ u8 sbrn; /* packed release number */
/* irq statistics */ /* irq statistics */
...@@ -637,6 +640,18 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) ...@@ -637,6 +640,18 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#define ehci_port_speed(ehci, portsc) (1<<USB_PORT_FEAT_HIGHSPEED) #define ehci_port_speed(ehci, portsc) (1<<USB_PORT_FEAT_HIGHSPEED)
#endif #endif
/*-------------------------------------------------------------------------*/
#ifdef CONFIG_PPC_83xx
/* Some Freescale processors have an erratum in which the TT
* port number in the queue head was 0..N-1 instead of 1..N.
*/
#define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug)
#else
#define ehci_has_fsl_portno_bug(e) (0)
#endif
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
#ifndef DEBUG #ifndef DEBUG
......
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