x86 setup: initialize LDTR and TR to make life easier to Intel VT

Intel VT doesn't like to engage when the protected-mode state isn't
fully initialized.  Make life easier for it by initializing LDTR (to
null) and TR (to a dummy hunk of low memory which will never actually
be touched.)
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

arch/x86/boot/pm.c

@@ -121,6 +121,10 @@ static void setup_gdt(void)
 		[GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
 		/* DS: data, read/write, 4 GB, base 0 */
 		[GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
+		/* TSS: 32-bit tss, 104 bytes, base 4096 */
+		/* We only have a TSS here to keep Intel VT happy;
+		   we don't actually use it for anything. */
+		[GDT_ENTRY_BOOT_TSS] = GDT_ENTRY(0x0089, 4096, 103),
 	};
 	/* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead
 	   of the gdt_ptr contents.  Thus, make it static so it will

arch/x86/boot/pmjump.S

@@ -36,6 +36,7 @@ protected_mode_jump:
 	addl	%ebx, 2f
 
 	movw	$__BOOT_DS, %cx
+	movw	$__BOOT_TSS, %di
 
 	movl	%cr0, %edx
 	orb	$1, %dl			# Protected mode (PE) bit
@@ -63,6 +64,9 @@ in_pm32:
 	# a valid stack if some debugging hack wants to use it.
 	addl	%ebx, %esp
 
+	# Set up TR to make Intel VT happy
+	ltr	%di
+
 	# Clear registers to allow for future extensions to the
 	# 32-bit boot protocol
 	xorl	%ecx, %ecx
@@ -71,6 +75,9 @@ in_pm32:
 	xorl	%ebp, %ebp
 	xorl	%edi, %edi
 
+	# Set up LDTR to make Intel VT happy
+	lldt	%cx
+
 	jmpl	*%eax			# Jump to the 32-bit entrypoint
 
 	.size	in_pm32, .-in_pm32

include/asm-x86/segment.h

@@ -9,6 +9,9 @@
 #define GDT_ENTRY_BOOT_DS	(GDT_ENTRY_BOOT_CS + 1)
 #define __BOOT_DS		(GDT_ENTRY_BOOT_DS * 8)
 
+#define GDT_ENTRY_BOOT_TSS	(GDT_ENTRY_BOOT_CS + 2)
+#define __BOOT_TSS		(GDT_ENTRY_BOOT_TSS * 8)
+
 #ifdef CONFIG_X86_32
 /*
  * The layout of the per-CPU GDT under Linux: