提交 8542c12b 编写于 作者: A Alex Deucher

drm/radeon: update DISPCLK programming for DCE8

Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 aea65641
...@@ -743,7 +743,7 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev, ...@@ -743,7 +743,7 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev,
* SetPixelClock provides the dividers * SetPixelClock provides the dividers
*/ */
args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk); args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);
if (ASIC_IS_DCE61(rdev)) if (ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev))
args.v6.ucPpll = ATOM_EXT_PLL1; args.v6.ucPpll = ATOM_EXT_PLL1;
else if (ASIC_IS_DCE6(rdev)) else if (ASIC_IS_DCE6(rdev))
args.v6.ucPpll = ATOM_PPLL0; args.v6.ucPpll = ATOM_PPLL0;
......
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