提交 80f01ca1 编写于 作者: L Linus Torvalds

Merge branch 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6

* 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6:
  gpio: pca953x: propagate the errno from the chip_init functions
  gpio: pca953x: remove unneeded check for chip type
  gpio/omap: check return value from irq_alloc_generic_chip
  gpio/omap: replace MOD_REG_BIT macro with static inline
......@@ -148,13 +148,17 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
}
#define MOD_REG_BIT(reg, bit_mask, set) \
do { \
int l = __raw_readl(base + reg); \
if (set) l |= bit_mask; \
else l &= ~bit_mask; \
__raw_writel(l, base + reg); \
} while(0)
static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
{
int l = __raw_readl(base + reg);
if (set)
l |= mask;
else
l &= ~mask;
__raw_writel(l, base + reg);
}
/**
* _set_gpio_debounce - low level gpio debounce time
......@@ -210,28 +214,28 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
u32 gpio_bit = 1 << gpio;
if (cpu_is_omap44xx()) {
MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
_gpio_rmw(base, OMAP4_GPIO_LEVELDETECT0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
_gpio_rmw(base, OMAP4_GPIO_LEVELDETECT1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
_gpio_rmw(base, OMAP4_GPIO_RISINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
_gpio_rmw(base, OMAP4_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
} else {
MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
_gpio_rmw(base, OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
_gpio_rmw(base, OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
_gpio_rmw(base, OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
_gpio_rmw(base, OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
}
if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
if (cpu_is_omap44xx()) {
MOD_REG_BIT(OMAP4_GPIO_IRQWAKEN0, gpio_bit,
trigger != 0);
_gpio_rmw(base, OMAP4_GPIO_IRQWAKEN0, gpio_bit,
trigger != 0);
} else {
/*
* GPIO wakeup request can only be generated on edge
......@@ -1086,6 +1090,11 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base,
handle_simple_irq);
if (!gc) {
dev_err(bank->dev, "Memory alloc failed for gc\n");
return;
}
ct = gc->chip_types;
/* NOTE: No ack required, reading IRQ status clears it. */
......
......@@ -596,9 +596,6 @@ static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert)
/* set platform specific polarity inversion */
ret = pca953x_write_reg(chip, PCA953X_INVERT, invert);
if (ret)
goto out;
return 0;
out:
return ret;
}
......@@ -640,7 +637,7 @@ static int __devinit pca953x_probe(struct i2c_client *client,
struct pca953x_platform_data *pdata;
struct pca953x_chip *chip;
int irq_base=0, invert=0;
int ret = 0;
int ret;
chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL);
if (chip == NULL)
......@@ -673,10 +670,10 @@ static int __devinit pca953x_probe(struct i2c_client *client,
pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
if (chip->chip_type == PCA953X_TYPE)
device_pca953x_init(chip, invert);
else if (chip->chip_type == PCA957X_TYPE)
device_pca957x_init(chip, invert);
ret = device_pca953x_init(chip, invert);
else
ret = device_pca957x_init(chip, invert);
if (ret)
goto out_failed;
ret = pca953x_irq_setup(chip, id, irq_base);
......
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