gcc-plugins: Automate make rule generation

There's no reason to repeat the same names in the Makefile when the .so
files have already been listed. The .o list can be generated from them.
Reported-by: NPaX Team <pageexec@freemail.hu>
Signed-off-by: NEmese Revfy <re.emese@gmail.com>
[kees: clarified commit message]
Signed-off-by: NKees Cook <keescook@chromium.org>

scripts/gcc-plugins/Makefile

@@ -21,7 +21,6 @@ endif
 $(HOSTLIBS)-y := $(GCC_PLUGIN)
 always := $($(HOSTLIBS)-y)
 
-cyc_complexity_plugin-objs := cyc_complexity_plugin.o
-sancov_plugin-objs := sancov_plugin.o
+$(foreach p,$($(HOSTLIBS)-y:%.so=%),$(eval $(p)-objs := $(p).o))
 
 clean-files += *.so