提交 6f4b82a3 编写于 作者: C Chanho Park 提交者: Kukjin Kim

ARM: dts: clean up arm-pmu node for exynos4

This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the interrupts only exynos4412.dtsi.

Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: NChanho Park <chanho61.park@samsung.com>
Tested-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
上级 d51cad7d
......@@ -123,6 +123,12 @@
reg = <0x10440000 0x1000>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
};
sys_reg: syscon@10010000 {
compatible = "samsung,exynos4-sysreg", "syscon";
reg = <0x10010000 0x400>;
......
......@@ -93,12 +93,6 @@
#clock-cells = <1>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
};
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>;
......
......@@ -26,6 +26,10 @@
samsung,combiner-nr = <20>;
};
pmu {
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
gic: interrupt-controller@10490000 {
cpu-offset = <0x4000>;
};
......
......@@ -31,12 +31,6 @@
mshc0 = &mshc_0;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
sysram@02020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;
......
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