ARM: LPC32xx: Adjust dtsi file for MLC controller configuration

This patch takes into account that the MTD NAND MLC controller needs more
registers, located actually before the previously allocated memory range,
already starting at 200a8000 instead of 200b0000.

Further, the interrupt for the controller is configured.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Tested-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>

arch/arm/boot/dts/lpc32xx.dtsi

@@ -38,9 +38,10 @@
 			status = "disable";
 		};
 
-		mlc: flash@200B0000 {
+		mlc: flash@200a8000 {
 			compatible = "nxp,lpc3220-mlc";
-			reg = <0x200B0000 0x1000>;
+			reg = <0x200a8000 0x11000>;
+			interrupts = <11 0>;
 			status = "disable";
 		};