提交 69c202af 编写于 作者: A Andrea Paterniani 提交者: Linus Torvalds

[PATCH] SPI: Freescale iMX SPI controller driver (BIS+)

Add the SPI controller driver for Freescale i.MX(S/L/1).
Main features summary:

 > Per chip setup via board specific code and/or protocol driver.
 > Per transfer setup.
 > PIO transfers.
 > DMA transfers.
 > Managing of NULL tx / rx buffer for rd only / wr only transfers.

This patch replace patch-2.6.20-rc4-spi_imx with the following changes:
 > Few cosmetic changes.
 > Function map_dma_buffers now return 0 for success and -1 for failure.
 > Solved a bug inside spi_imx_probe function (wrong error path).
 > Solved a bug inside setup function (bad undo setup for max_speed_hz).
 > For read-only transfers, always write zero bytes.

This is almost the same as the 'BIS' version sent by Andrea, except for
updating the 'DUMMY' byte so that read-only transfers shift out zeroes.
That part of the API changed recently, since some half duplex peripheral
chips require that semantic.
Signed-off-by: NAndrea Paterniani <a.paterniani@swapp-eng.it>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 fdb3c18d
......@@ -75,6 +75,13 @@ config SPI_BUTTERFLY
inexpensive battery powered microcontroller evaluation board.
This same cable can be used to flash new firmware.
config SPI_IMX
tristate "Freescale iMX SPI controller"
depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL
help
This enables using the Freescale iMX SPI controller in master
mode.
config SPI_MPC83xx
tristate "Freescale MPC83xx SPI controller"
depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL
......@@ -94,6 +101,7 @@ config SPI_OMAP_UWIRE
help
This hooks up to the MicroWire controller on OMAP1 chips.
config SPI_PXA2XX
tristate "PXA2xx SSP SPI master"
depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL
......
......@@ -13,6 +13,7 @@ obj-$(CONFIG_SPI_MASTER) += spi.o
# SPI master controller drivers (bus)
obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o
obj-$(CONFIG_SPI_IMX) += spi_imx.o
obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o
......
此差异已折叠。
/*
* include/asm-arm/arch-imx/spi_imx.h
*
* Copyright (C) 2006 SWAPP
* Andrea Paterniani <a.paterniani@swapp-eng.it>
*
* Initial version inspired by:
* linux-2.6.17-rc3-mm1/include/asm-arm/arch-pxa/pxa2xx_spi.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef SPI_IMX_H_
#define SPI_IMX_H_
/*-------------------------------------------------------------------------*/
/**
* struct spi_imx_master - device.platform_data for SPI controller devices.
* @num_chipselect: chipselects are used to distinguish individual
* SPI slaves, and are numbered from zero to num_chipselects - 1.
* each slave has a chipselect signal, but it's common that not
* every chipselect is connected to a slave.
* @enable_dma: if true enables DMA driven transfers.
*/
struct spi_imx_master {
u8 num_chipselect;
u8 enable_dma:1;
};
/*-------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------*/
/**
* struct spi_imx_chip - spi_board_info.controller_data for SPI
* slave devices, copied to spi_device.controller_data.
* @enable_loopback : used for test purpouse to internally connect RX and TX
* sections.
* @enable_dma : enables dma transfer (provided that controller driver has
* dma enabled too).
* @ins_ss_pulse : enable /SS pulse insertion between SPI burst.
* @bclk_wait : number of bclk waits between each bits_per_word SPI burst.
* @cs_control : function pointer to board-specific function to assert/deassert
* I/O port to control HW generation of devices chip-select.
*/
struct spi_imx_chip {
u8 enable_loopback:1;
u8 enable_dma:1;
u8 ins_ss_pulse:1;
u16 bclk_wait:15;
void (*cs_control)(u32 control);
};
/* Chip-select state */
#define SPI_CS_ASSERT (1 << 0)
#define SPI_CS_DEASSERT (1 << 1)
/*-------------------------------------------------------------------------*/
#endif /* SPI_IMX_H_*/
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