drm/i915: Apply display workaround required according to the B-Spec.

Not known to fix any current bugs.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>

drivers/gpu/drm/i915/i915_reg.h

@@ -2609,6 +2609,8 @@
 #define GTIER   0x4401c
 
 #define ILK_DISPLAY_CHICKEN2	0x42004
+/* Required on all Ironlake and Sandybridge according to the B-Spec. */
+#define  ILK_ELPIN_409_SELECT	(1 << 25)
 #define  ILK_DPARB_GATE	(1<<22)
 #define  ILK_VSDPFD_FULL	(1<<21)
 #define ILK_DSPCLK_GATE		0x42020

drivers/gpu/drm/i915/intel_display.c

@@ -5819,6 +5819,10 @@ void intel_init_clock_gating(struct drm_device *dev)
 				   ILK_CLK_FBC);
 		}
 
+		I915_WRITE(ILK_DISPLAY_CHICKEN2,
+			   I915_READ(ILK_DISPLAY_CHICKEN2) |
+			   ILK_ELPIN_409_SELECT);
+
 		if (IS_GEN5(dev)) {
 			I915_WRITE(_3D_CHICKEN2,
 				   _3D_CHICKEN2_WM_READ_PIPELINED << 16 |