提交 60712dc2 编写于 作者: T tanshukun 提交者: Xie XiuQi

ACC: crypto/hisilicon/qm: Fix warning of reviewbot check

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

Feature or Bugfix:Bugfix
Signed-off-by: Ntanshukun (A) <tanshukun1@huawei.com>
Reviewed-by: Nwangzhou <wangzhou1@hisilicon.com>
Signed-off-by: Nlingmingqiang <lingmingqiang@huawei.com>
Reviewed-by: Nlingmingqiang <lingmingqiang@huawei.com>
Reviewed-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 c467ca4d
...@@ -353,7 +353,7 @@ static void qm_mb_write(struct hisi_qm *qm, const void *src) ...@@ -353,7 +353,7 @@ static void qm_mb_write(struct hisi_qm *qm, const void *src)
} }
static int qm_mb(struct hisi_qm *qm, u8 cmd, dma_addr_t dma_addr, u16 queue, static int qm_mb(struct hisi_qm *qm, u8 cmd, dma_addr_t dma_addr, u16 queue,
bool op, bool event) bool op)
{ {
struct qm_mailbox mailbox; struct qm_mailbox mailbox;
int ret = 0; int ret = 0;
...@@ -362,7 +362,6 @@ static int qm_mb(struct hisi_qm *qm, u8 cmd, dma_addr_t dma_addr, u16 queue, ...@@ -362,7 +362,6 @@ static int qm_mb(struct hisi_qm *qm, u8 cmd, dma_addr_t dma_addr, u16 queue,
cmd, dma_addr); cmd, dma_addr);
mailbox.w0 = cmd | mailbox.w0 = cmd |
(event ? 0x1 << QM_MB_EVENT_SHIFT : 0) |
(op ? 0x1 << QM_MB_OP_SHIFT : 0) | (op ? 0x1 << QM_MB_OP_SHIFT : 0) |
(0x1 << QM_MB_BUSY_SHIFT); (0x1 << QM_MB_BUSY_SHIFT);
mailbox.queue_num = queue; mailbox.queue_num = queue;
...@@ -794,7 +793,7 @@ static int qm_get_vft_v2(struct hisi_qm *qm, u32 *base, u32 *number) ...@@ -794,7 +793,7 @@ static int qm_get_vft_v2(struct hisi_qm *qm, u32 *base, u32 *number)
u64 sqc_vft; u64 sqc_vft;
int ret; int ret;
ret = qm_mb(qm, QM_MB_CMD_SQC_VFT_V2, 0, 0, 1, 0); ret = qm_mb(qm, QM_MB_CMD_SQC_VFT_V2, 0, 0, 1);
if (ret) if (ret)
return ret; return ret;
...@@ -1067,35 +1066,35 @@ static void qm_log_hw_error(struct hisi_qm *qm, u32 error_status) ...@@ -1067,35 +1066,35 @@ static void qm_log_hw_error(struct hisi_qm *qm, u32 error_status)
struct device *dev = &qm->pdev->dev; struct device *dev = &qm->pdev->dev;
u32 reg_val, type, vf_num; u32 reg_val, type, vf_num;
while (err->msg) { while ((err++)->msg) {
if (err->int_msk & error_status) { if (!(err->int_msk & error_status))
dev_err(dev, "%s [error status=0x%x] found\n", continue;
err->msg, err->int_msk);
dev_err(dev, "%s [error status=0x%x] found\n",
if (err->int_msk & QM_DB_TIMEOUT) { err->msg, err->int_msk);
reg_val = readl(qm->io_base +
QM_ABNORMAL_INF01); if (err->int_msk & QM_DB_TIMEOUT) {
type = (reg_val & QM_DB_TIMEOUT_TYPE) >> reg_val = readl(qm->io_base +
QM_DB_TIMEOUT_TYPE_SHIFT; QM_ABNORMAL_INF01);
vf_num = reg_val & QM_DB_TIMEOUT_VF; type = (reg_val & QM_DB_TIMEOUT_TYPE) >>
dev_err(dev, "qm %s doorbell timeout in function %u\n", QM_DB_TIMEOUT_TYPE_SHIFT;
qm_db_timeout[type], vf_num); vf_num = reg_val & QM_DB_TIMEOUT_VF;
} else if (err->int_msk & QM_OF_FIFO_OF) { dev_err(dev, "qm %s doorbell timeout in function %u\n",
reg_val = readl(qm->io_base + qm_db_timeout[type], vf_num);
QM_ABNORMAL_INF00); } else if (err->int_msk & QM_OF_FIFO_OF) {
type = (reg_val & QM_FIFO_OVERFLOW_TYPE) >> reg_val = readl(qm->io_base +
QM_FIFO_OVERFLOW_TYPE_SHIFT; QM_ABNORMAL_INF00);
vf_num = reg_val & QM_FIFO_OVERFLOW_VF; type = (reg_val & QM_FIFO_OVERFLOW_TYPE) >>
QM_FIFO_OVERFLOW_TYPE_SHIFT;
if (type < ARRAY_SIZE(qm_fifo_overflow)) vf_num = reg_val & QM_FIFO_OVERFLOW_VF;
dev_err(dev, "qm %s fifo overflow in function %u\n",
qm_fifo_overflow[type], if (type < ARRAY_SIZE(qm_fifo_overflow))
vf_num); dev_err(dev, "qm %s fifo overflow in function %u\n",
else qm_fifo_overflow[type],
dev_err(dev, "unknown error type\n"); vf_num);
} else
dev_err(dev, "unknown error type\n");
} }
err++;
} }
} }
...@@ -1287,7 +1286,7 @@ static int qm_sq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) ...@@ -1287,7 +1286,7 @@ static int qm_sq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid)
sqc->cq_num = qp_id; sqc->cq_num = qp_id;
sqc->w13 = QM_MK_SQC_W13(0, 1, qp->alg_type); sqc->w13 = QM_MK_SQC_W13(0, 1, qp->alg_type);
ret = qm_mb(qm, QM_MB_CMD_SQC, sqc_dma, qp_id, 0, 0); ret = qm_mb(qm, QM_MB_CMD_SQC, sqc_dma, qp_id, 0);
if (qm->use_dma_api) { if (qm->use_dma_api) {
dma_unmap_single(dev, sqc_dma, sizeof(struct qm_sqc), dma_unmap_single(dev, sqc_dma, sizeof(struct qm_sqc),
DMA_TO_DEVICE); DMA_TO_DEVICE);
...@@ -1334,7 +1333,7 @@ static int qm_cq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) ...@@ -1334,7 +1333,7 @@ static int qm_cq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid)
} }
cqc->dw6 = 1 << QM_CQ_PHASE_SHIFT | qp->c_flag << QM_CQ_FLAG_SHIFT; cqc->dw6 = 1 << QM_CQ_PHASE_SHIFT | qp->c_flag << QM_CQ_FLAG_SHIFT;
ret = qm_mb(qm, QM_MB_CMD_CQC, cqc_dma, qp_id, 0, 0); ret = qm_mb(qm, QM_MB_CMD_CQC, cqc_dma, qp_id, 0);
if (qm->use_dma_api) { if (qm->use_dma_api) {
dma_unmap_single(dev, cqc_dma, sizeof(struct qm_cqc), dma_unmap_single(dev, cqc_dma, sizeof(struct qm_cqc),
DMA_TO_DEVICE); DMA_TO_DEVICE);
...@@ -2096,13 +2095,9 @@ static int qm_eq_ctx_cfg(struct hisi_qm *qm) ...@@ -2096,13 +2095,9 @@ static int qm_eq_ctx_cfg(struct hisi_qm *qm)
{ {
struct device *dev = &qm->pdev->dev; struct device *dev = &qm->pdev->dev;
struct qm_eqc *eqc; struct qm_eqc *eqc;
struct qm_aeqc *aeqc;
dma_addr_t eqc_dma; dma_addr_t eqc_dma;
dma_addr_t aeqc_dma;
int ret; int ret;
qm_init_eq_aeq_status(qm);
if (qm->use_dma_api) { if (qm->use_dma_api) {
eqc = kzalloc(sizeof(struct qm_eqc), GFP_KERNEL); eqc = kzalloc(sizeof(struct qm_eqc), GFP_KERNEL);
if (!eqc) if (!eqc)
...@@ -2123,16 +2118,23 @@ static int qm_eq_ctx_cfg(struct hisi_qm *qm) ...@@ -2123,16 +2118,23 @@ static int qm_eq_ctx_cfg(struct hisi_qm *qm)
if (qm->ver == QM_HW_V1) if (qm->ver == QM_HW_V1)
eqc->dw3 = QM_EQE_AEQE_SIZE; eqc->dw3 = QM_EQE_AEQE_SIZE;
eqc->dw6 = (QM_EQ_DEPTH - 1) | (1 << QM_EQC_PHASE_SHIFT); eqc->dw6 = (QM_EQ_DEPTH - 1) | (1 << QM_EQC_PHASE_SHIFT);
ret = qm_mb(qm, QM_MB_CMD_EQC, eqc_dma, 0, 0, 0); ret = qm_mb(qm, QM_MB_CMD_EQC, eqc_dma, 0, 0);
if (qm->use_dma_api) { if (qm->use_dma_api) {
dma_unmap_single(dev, eqc_dma, sizeof(struct qm_eqc), dma_unmap_single(dev, eqc_dma, sizeof(struct qm_eqc),
DMA_TO_DEVICE); DMA_TO_DEVICE);
kfree(eqc); kfree(eqc);
} else { } else
memset(eqc, 0, sizeof(struct qm_eqc)); memset(eqc, 0, sizeof(struct qm_eqc));
}
if (ret) return ret;
return ret; }
static int qm_aeq_ctx_cfg(struct hisi_qm *qm)
{
struct device *dev = &qm->pdev->dev;
struct qm_aeqc *aeqc;
dma_addr_t aeqc_dma;
int ret;
if (qm->use_dma_api) { if (qm->use_dma_api) {
aeqc = kzalloc(sizeof(struct qm_aeqc), GFP_KERNEL); aeqc = kzalloc(sizeof(struct qm_aeqc), GFP_KERNEL);
...@@ -2152,18 +2154,33 @@ static int qm_eq_ctx_cfg(struct hisi_qm *qm) ...@@ -2152,18 +2154,33 @@ static int qm_eq_ctx_cfg(struct hisi_qm *qm)
aeqc->base_l = lower_32_bits(qm->aeqe_dma); aeqc->base_l = lower_32_bits(qm->aeqe_dma);
aeqc->base_h = upper_32_bits(qm->aeqe_dma); aeqc->base_h = upper_32_bits(qm->aeqe_dma);
aeqc->dw6 = (QM_Q_DEPTH - 1) | (1 << QM_EQC_PHASE_SHIFT); aeqc->dw6 = (QM_Q_DEPTH - 1) | (1 << QM_EQC_PHASE_SHIFT);
ret = qm_mb(qm, QM_MB_CMD_AEQC, aeqc_dma, 0, 0, 0); ret = qm_mb(qm, QM_MB_CMD_AEQC, aeqc_dma, 0, 0);
if (qm->use_dma_api) { if (qm->use_dma_api) {
dma_unmap_single(dev, aeqc_dma, sizeof(struct qm_aeqc), dma_unmap_single(dev, aeqc_dma, sizeof(struct qm_aeqc),
DMA_TO_DEVICE); DMA_TO_DEVICE);
kfree(aeqc); kfree(aeqc);
} else { } else
memset(aeqc, 0, sizeof(struct qm_aeqc)); memset(aeqc, 0, sizeof(struct qm_aeqc));
}
return ret; return ret;
} }
static int qm_eq_aeq_ctx_cfg(struct hisi_qm *qm)
{
struct device *dev = &qm->pdev->dev;
int ret;
qm_init_eq_aeq_status(qm);
ret = qm_eq_ctx_cfg(qm);
if (ret) {
dev_err(dev, "Set eqc failed!\n");
return ret;
}
return qm_aeq_ctx_cfg(qm);
}
static int __hisi_qm_start(struct hisi_qm *qm) static int __hisi_qm_start(struct hisi_qm *qm)
{ {
struct pci_dev *pdev = qm->pdev; struct pci_dev *pdev = qm->pdev;
...@@ -2229,15 +2246,15 @@ static int __hisi_qm_start(struct hisi_qm *qm) ...@@ -2229,15 +2246,15 @@ static int __hisi_qm_start(struct hisi_qm *qm)
return -EINVAL; return -EINVAL;
} }
#endif #endif
ret = qm_eq_ctx_cfg(qm); ret = qm_eq_aeq_ctx_cfg(qm);
if (ret) if (ret)
return ret; return ret;
ret = qm_mb(qm, QM_MB_CMD_SQC_BT, qm->sqc_dma, 0, 0, 0); ret = qm_mb(qm, QM_MB_CMD_SQC_BT, qm->sqc_dma, 0, 0);
if (ret) if (ret)
return ret; return ret;
ret = qm_mb(qm, QM_MB_CMD_CQC_BT, qm->cqc_dma, 0, 0, 0); ret = qm_mb(qm, QM_MB_CMD_CQC_BT, qm->cqc_dma, 0, 0);
if (ret) if (ret)
return ret; return ret;
...@@ -2296,7 +2313,7 @@ int hisi_qm_start(struct hisi_qm *qm) ...@@ -2296,7 +2313,7 @@ int hisi_qm_start(struct hisi_qm *qm)
unsigned long dko_page_nr = 0; unsigned long dko_page_nr = 0;
unsigned long mmio_page_nr; unsigned long mmio_page_nr;
#endif #endif
int ret = 0; int ret;
down_write(&qm->qps_lock); down_write(&qm->qps_lock);
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册