spi/xilinx: Support cores with no interrupt
The core can run in polling mode. In fact, the performance of the core is similar (or even better), due to the fact most of the spi transactions are just a couple of bytes and there is one irq per transactions. When an mtd device is connected via spi, reading 8MB of data produces more than 80K interrupts (with irq disabling, context swith....) Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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