提交 5c00fac0 编写于 作者: S Steven Toth 提交者: Mauro Carvalho Chehab

V4L/DVB (7252): cx88: Add support for the Dvico PCI Nano

ATSC is known to work.
SVideo / Composite should work (I have no cable to test).
Analog tuner support does not work.
Signed-off-by: NSteven Toth <stoth@hauppauge.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@infradead.org>
上级 7102b773
...@@ -57,3 +57,4 @@ ...@@ -57,3 +57,4 @@
56 -> Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder [0070:9600,0070:9601,0070:9602] 56 -> Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder [0070:9600,0070:9601,0070:9602]
57 -> ADS Tech Instant Video PCI [1421:0390] 57 -> ADS Tech Instant Video PCI [1421:0390]
58 -> Pinnacle PCTV HD 800i [11bd:0051] 58 -> Pinnacle PCTV HD 800i [11bd:0051]
59 -> DVICO HDTV5 PCI Nano [18ac:d530]
...@@ -1401,6 +1401,29 @@ static const struct cx88_board cx88_boards[] = { ...@@ -1401,6 +1401,29 @@ static const struct cx88_board cx88_boards[] = {
}}, }},
.mpeg = CX88_MPEG_DVB, .mpeg = CX88_MPEG_DVB,
}, },
[CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO] = {
.name = "DVICO HDTV5 PCI Nano",
.tuner_type = TUNER_ABSENT,
.radio_type = UNSET,
.tuner_addr = ADDR_UNSET,
.radio_addr = ADDR_UNSET,
.input = {{
.type = CX88_VMUX_TELEVISION,
.vmux = 0,
.gpio0 = 0x000027df, /* Unconfirmed */
}, {
.type = CX88_VMUX_COMPOSITE1,
.vmux = 1,
.gpio0 = 0x000027df, /* Unconfirmed */
.audioroute = 1,
}, {
.type = CX88_VMUX_SVIDEO,
.vmux = 2,
.gpio0 = 0x000027df, /* Unconfirmed */
.audioroute = 1,
} },
.mpeg = CX88_MPEG_DVB,
},
}; };
/* ------------------------------------------------------------------ */ /* ------------------------------------------------------------------ */
...@@ -1714,6 +1737,10 @@ static const struct cx88_subid cx88_subids[] = { ...@@ -1714,6 +1737,10 @@ static const struct cx88_subid cx88_subids[] = {
.subvendor = 0x11bd, .subvendor = 0x11bd,
.subdevice = 0x0051, .subdevice = 0x0051,
.card = CX88_BOARD_PINNACLE_PCTV_HD_800i, .card = CX88_BOARD_PINNACLE_PCTV_HD_800i,
}, {
.subvendor = 0x18ac,
.subdevice = 0xd530,
.card = CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO,
}, },
}; };
......
...@@ -45,6 +45,8 @@ ...@@ -45,6 +45,8 @@
#include "nxt200x.h" #include "nxt200x.h"
#include "cx24123.h" #include "cx24123.h"
#include "isl6421.h" #include "isl6421.h"
#include "tuner-xc2028.h"
#include "tuner-xc2028-types.h"
MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
...@@ -357,6 +359,40 @@ static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe, ...@@ -357,6 +359,40 @@ static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
return 0; return 0;
} }
static int cx88_xc3028_callback(void *ptr, int command, int arg)
{
struct cx88_core *core = ptr;
switch (command) {
case XC2028_TUNER_RESET:
/* Send the tuner in then out of reset */
dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
switch (core->boardnr) {
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
/* GPIO-4 xc3028 tuner */
cx_set(MO_GP0_IO, 0x00001000);
cx_clear(MO_GP0_IO, 0x00000010);
msleep(100);
cx_set(MO_GP0_IO, 0x00000010);
msleep(100);
break;
}
break;
case XC2028_RESET_CLK:
dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
break;
default:
dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
command, arg);
return -EINVAL;
}
return 0;
}
static struct cx24123_config geniatech_dvbs_config = { static struct cx24123_config geniatech_dvbs_config = {
.demod_address = 0x55, .demod_address = 0x55,
.set_ts_params = cx24123_set_ts_param, .set_ts_params = cx24123_set_ts_param,
...@@ -383,6 +419,15 @@ static struct s5h1409_config pinnacle_pctv_hd_800i_config = { ...@@ -383,6 +419,15 @@ static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
.mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK, .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
}; };
static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
.demod_address = 0x32 >> 1,
.output_mode = S5H1409_SERIAL_OUTPUT,
.gpio = S5H1409_GPIO_OFF,
.inversion = S5H1409_INVERSION_OFF,
.status_mode = S5H1409_DEMODLOCKING,
.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};
static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = { static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
.i2c_address = 0x64, .i2c_address = 0x64,
.if_khz = 5380, .if_khz = 5380,
...@@ -658,6 +703,30 @@ static int dvb_register(struct cx8802_dev *dev) ...@@ -658,6 +703,30 @@ static int dvb_register(struct cx8802_dev *dev)
&pinnacle_pctv_hd_800i_tuner_config); &pinnacle_pctv_hd_800i_tuner_config);
} }
break; break;
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
dev->dvb.frontend = dvb_attach(s5h1409_attach,
&dvico_hdtv5_pci_nano_config,
&dev->core->i2c_adap);
if (dev->dvb.frontend != NULL) {
struct dvb_frontend *fe;
struct xc2028_config cfg = {
.i2c_adap = &dev->core->i2c_adap,
.i2c_addr = 0x61,
.video_dev = dev->core,
.callback = cx88_xc3028_callback,
};
static struct xc2028_ctrl ctl = {
.fname = "xc3028-v27.fw",
.max_len = 64,
.scode_table = OREN538,
};
fe = dvb_attach(xc2028_attach,
dev->dvb.frontend, &cfg);
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
fe->ops.tuner_ops.set_config(fe, &ctl);
}
break;
default: default:
printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n", printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
dev->core->name); dev->core->name);
......
...@@ -211,6 +211,7 @@ extern struct sram_channel cx88_sram_channels[]; ...@@ -211,6 +211,7 @@ extern struct sram_channel cx88_sram_channels[];
#define CX88_BOARD_HAUPPAUGE_HVR1300 56 #define CX88_BOARD_HAUPPAUGE_HVR1300 56
#define CX88_BOARD_ADSTECH_PTV_390 57 #define CX88_BOARD_ADSTECH_PTV_390 57
#define CX88_BOARD_PINNACLE_PCTV_HD_800i 58 #define CX88_BOARD_PINNACLE_PCTV_HD_800i 58
#define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
enum cx88_itype { enum cx88_itype {
CX88_VMUX_COMPOSITE1 = 1, CX88_VMUX_COMPOSITE1 = 1,
......
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