提交 5b7b4d09 编写于 作者: C chenxiang 提交者: Xie XiuQi

scsi: hisi_sas: disable stash for v3 hw

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

For v3 hw, stash is enabled to promote performance, but it does little
help for promoting performance according to current test. What's more, it
causes exception for some situations, so disable stash.
Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: NJohn Garry <john.garry@huawei.com>

Feature or Bugfix:Bugfix
Signed-off-by: Nchenxiang (M) <chenxiang66@hisilicon.com>
Reviewed-by: Nhuangdaode <huangdaode@hisilicon.com>
Reviewed-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 3cf5da06
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#define ITCT_CLR_EN_MSK (0x1 << ITCT_CLR_EN_OFF) #define ITCT_CLR_EN_MSK (0x1 << ITCT_CLR_EN_OFF)
#define ITCT_DEV_OFF 0 #define ITCT_DEV_OFF 0
#define ITCT_DEV_MSK (0x7ff << ITCT_DEV_OFF) #define ITCT_DEV_MSK (0x7ff << ITCT_DEV_OFF)
#define SAS_AXI_USER3 0x50
#define IO_SATA_BROKEN_MSG_ADDR_LO 0x58 #define IO_SATA_BROKEN_MSG_ADDR_LO 0x58
#define IO_SATA_BROKEN_MSG_ADDR_HI 0x5c #define IO_SATA_BROKEN_MSG_ADDR_HI 0x5c
#define SATA_INITI_D2H_STORE_ADDR_LO 0x60 #define SATA_INITI_D2H_STORE_ADDR_LO 0x60
...@@ -570,6 +571,7 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba) ...@@ -570,6 +571,7 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba)
/* Global registers init */ /* Global registers init */
hisi_sas_write32(hisi_hba, DLVRY_QUEUE_ENABLE, hisi_sas_write32(hisi_hba, DLVRY_QUEUE_ENABLE,
(u32)((1ULL << hisi_hba->queue_count) - 1)); (u32)((1ULL << hisi_hba->queue_count) - 1));
hisi_sas_write32(hisi_hba, SAS_AXI_USER3, 0);
hisi_sas_write32(hisi_hba, CFG_MAX_TAG, 0xfff0400); hisi_sas_write32(hisi_hba, CFG_MAX_TAG, 0xfff0400);
hisi_sas_write32(hisi_hba, HGC_SAS_TXFAIL_RETRY_CTRL, 0x108); hisi_sas_write32(hisi_hba, HGC_SAS_TXFAIL_RETRY_CTRL, 0x108);
hisi_sas_write32(hisi_hba, CFG_AGING_TIME, 0x1); hisi_sas_write32(hisi_hba, CFG_AGING_TIME, 0x1);
......
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