drm/nouveau/pm/nv50: TPC[0x3] must be used for PGRAPH muxs on G80

I thought that using TPC[0x0] like for G84:GT215 was sufficient on G80,
but it's actually not the case. According to NVIDIA PerfKit on Windows,
we have to configure PGRAPH related muxs on TPC[0x3] for this chipset.
Signed-off-by: NSamuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/engine/pm/g84.c

@@ -32,6 +32,15 @@ g84_vfetch_sources[] = {
 	{}
 };
 
+static const struct nvkm_specsrc
+g84_prop_sources[] = {
+	{ 0x408e50, (const struct nvkm_specmux[]) {
+			{ 0x1f, 0, "sel", true },
+			{}
+		}, "pgraph_tpc0_prop_pm_mux" },
+	{}
+};
+
 static const struct nvkm_specsrc
 g84_crop_sources[] = {
 	{ 0x407008, (const struct nvkm_specmux[]) {
@@ -109,14 +118,14 @@ g84_pm[] = {
 			{ 0x31, "pc02_crop_01", g84_crop_sources },
 			{ 0x32, "pc02_crop_02", g84_crop_sources },
 			{ 0x33, "pc02_crop_03", g84_crop_sources },
-			{ 0x00, "pc02_prop_00", nv50_prop_sources },
-			{ 0x01, "pc02_prop_01", nv50_prop_sources },
-			{ 0x02, "pc02_prop_02", nv50_prop_sources },
-			{ 0x03, "pc02_prop_03", nv50_prop_sources },
-			{ 0x04, "pc02_prop_04", nv50_prop_sources },
-			{ 0x05, "pc02_prop_05", nv50_prop_sources },
-			{ 0x06, "pc02_prop_06", nv50_prop_sources },
-			{ 0x07, "pc02_prop_07", nv50_prop_sources },
+			{ 0x00, "pc02_prop_00", g84_prop_sources },
+			{ 0x01, "pc02_prop_01", g84_prop_sources },
+			{ 0x02, "pc02_prop_02", g84_prop_sources },
+			{ 0x03, "pc02_prop_03", g84_prop_sources },
+			{ 0x04, "pc02_prop_04", g84_prop_sources },
+			{ 0x05, "pc02_prop_05", g84_prop_sources },
+			{ 0x06, "pc02_prop_06", g84_prop_sources },
+			{ 0x07, "pc02_prop_07", g84_prop_sources },
 			{ 0x48, "pc02_tex_00", g84_tex_sources },
 			{ 0x49, "pc02_tex_01", g84_tex_sources },
 			{ 0x4a, "pc02_tex_02", g84_tex_sources },

drivers/gpu/drm/nouveau/nvkm/engine/pm/nv50.c

@@ -23,15 +23,6 @@
  */
 #include "nv40.h"
 
-const struct nvkm_specsrc
-nv50_prop_sources[] = {
-	{ 0x408e50, (const struct nvkm_specmux[]) {
-			{ 0x1f, 0, "sel", true },
-			{}
-		}, "pgraph_tpc0_prop_pm_mux" },
-	{}
-};
-
 const struct nvkm_specsrc
 nv50_zcull_sources[] = {
 	{ 0x402ca4, (const struct nvkm_specmux[]) {
@@ -51,6 +42,15 @@ nv50_zrop_sources[] = {
 	{}
 };
 
+static const struct nvkm_specsrc
+nv50_prop_sources[] = {
+	{ 0x40be50, (const struct nvkm_specmux[]) {
+			{ 0x1f, 0, "sel", true },
+			{}
+		}, "pgraph_tpc3_prop_pm_mux" },
+	{}
+};
+
 static const struct nvkm_specsrc
 nv50_crop_sources[] = {
         { 0x407008, (const struct nvkm_specmux[]) {
@@ -63,10 +63,10 @@ nv50_crop_sources[] = {
 
 static const struct nvkm_specsrc
 nv50_tex_sources[] = {
-	{ 0x408808, (const struct nvkm_specmux[]) {
+	{ 0x40b808, (const struct nvkm_specmux[]) {
 			{ 0x3fff, 0, "unk0" },
 			{}
-		}, "pgraph_tpc0_tex_unk08" },
+		}, "pgraph_tpc3_tex_unk08" },
 	{}
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h

@@ -44,7 +44,6 @@ struct nvkm_perfsrc {
 	bool enable;
 };
 
-extern const struct nvkm_specsrc nv50_prop_sources[];
 extern const struct nvkm_specsrc nv50_zcull_sources[];
 extern const struct nvkm_specsrc nv50_zrop_sources[];
 extern const struct nvkm_specsrc g84_vfetch_sources[];