提交 58d94227 编写于 作者: D David S. Miller

Merge branch 'be2net-next'

Sathya Perla says:

====================
be2net: patch set

Hi David, as the below patch-set includes minor bug fixes and some
code re-org, pls consider applying it to the "net-next" tree. Thanks!

Patch 1 fixes a bit of code duplication involving interface object
creation code.

Patch 2 ensures that when a flow-control FW cmd fails, the adapter state
continues to reflect the old values. This allows for correct reporting
on subsequent ethtool "get".

Patch 3 returns proper error for link config change on BE3/Lancer

Patch 4 adds a kernel log message for FW boot error on Lancer

Patch 5 adds a function reset on Lancer as a part of the function init
sequence.

Patch 6 moves some FW-cmd definitions that belong in be_cmds.h, but
were placed in be_hw.h

Patch 7 resets the "bw_min" field while configuring "bw_max" needed
for TX rate limiting config.
====================
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
......@@ -573,7 +573,7 @@ static int lancer_wait_ready(struct be_adapter *adapter)
{
#define SLIPORT_READY_TIMEOUT 30
u32 sliport_status;
int status = 0, i;
int i;
for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
......@@ -584,9 +584,9 @@ static int lancer_wait_ready(struct be_adapter *adapter)
}
if (i == SLIPORT_READY_TIMEOUT)
status = -1;
return sliport_status ? : -1;
return status;
return 0;
}
static bool lancer_provisioning_error(struct be_adapter *adapter)
......@@ -624,7 +624,7 @@ int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
iowrite32(SLI_PORT_CONTROL_IP_MASK,
adapter->db + SLIPORT_CONTROL_OFFSET);
/* check adapter has corrected the error */
/* check if adapter has corrected the error */
status = lancer_wait_ready(adapter);
sliport_status = ioread32(adapter->db +
SLIPORT_STATUS_OFFSET);
......@@ -655,7 +655,11 @@ int be_fw_wait_ready(struct be_adapter *adapter)
if (lancer_chip(adapter)) {
status = lancer_wait_ready(adapter);
return status;
if (status) {
stage = status;
goto err;
}
return 0;
}
do {
......@@ -671,7 +675,8 @@ int be_fw_wait_ready(struct be_adapter *adapter)
timeout += 2;
} while (timeout < 60);
dev_err(dev, "POST timeout; stage=0x%x\n", stage);
err:
dev_err(dev, "POST timeout; stage=%#x\n", stage);
return -1;
}
......@@ -3751,6 +3756,7 @@ int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed,
be_reset_nic_desc(&nic_desc);
nic_desc.pf_num = adapter->pf_number;
nic_desc.vf_num = domain;
nic_desc.bw_min = 0;
if (lancer_chip(adapter)) {
nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0;
nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0;
......@@ -4092,7 +4098,7 @@ int be_cmd_set_logical_link_config(struct be_adapter *adapter,
int status;
if (BEx_chip(adapter) || lancer_chip(adapter))
return 0;
return -EOPNOTSUPP;
spin_lock_bh(&adapter->mcc_lock);
......
......@@ -1161,7 +1161,167 @@ struct be_cmd_resp_get_beacon_state {
u8 rsvd0[3];
} __packed;
/* Flashrom related descriptors */
#define MAX_FLASH_COMP 32
#define OPTYPE_ISCSI_ACTIVE 0
#define OPTYPE_REDBOOT 1
#define OPTYPE_BIOS 2
#define OPTYPE_PXE_BIOS 3
#define OPTYPE_FCOE_BIOS 8
#define OPTYPE_ISCSI_BACKUP 9
#define OPTYPE_FCOE_FW_ACTIVE 10
#define OPTYPE_FCOE_FW_BACKUP 11
#define OPTYPE_NCSI_FW 13
#define OPTYPE_REDBOOT_DIR 18
#define OPTYPE_REDBOOT_CONFIG 19
#define OPTYPE_SH_PHY_FW 21
#define OPTYPE_FLASHISM_JUMPVECTOR 22
#define OPTYPE_UFI_DIR 23
#define OPTYPE_PHY_FW 99
#define FLASH_BIOS_IMAGE_MAX_SIZE_g2 262144 /* Max OPTION ROM image sz */
#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 262144 /* Max Redboot image sz */
#define FLASH_IMAGE_MAX_SIZE_g2 1310720 /* Max firmware image size */
#define FLASH_NCSI_IMAGE_MAX_SIZE_g3 262144
#define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144
#define FLASH_BIOS_IMAGE_MAX_SIZE_g3 524288 /* Max OPTION ROM image sz */
#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 1048576 /* Max Redboot image sz */
#define FLASH_IMAGE_MAX_SIZE_g3 2097152 /* Max firmware image size */
/* Offsets for components on Flash. */
#define FLASH_REDBOOT_START_g2 0
#define FLASH_FCoE_BIOS_START_g2 524288
#define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 1048576
#define FLASH_iSCSI_BACKUP_IMAGE_START_g2 2359296
#define FLASH_FCoE_PRIMARY_IMAGE_START_g2 3670016
#define FLASH_FCoE_BACKUP_IMAGE_START_g2 4980736
#define FLASH_iSCSI_BIOS_START_g2 7340032
#define FLASH_PXE_BIOS_START_g2 7864320
#define FLASH_REDBOOT_START_g3 262144
#define FLASH_PHY_FW_START_g3 1310720
#define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 2097152
#define FLASH_iSCSI_BACKUP_IMAGE_START_g3 4194304
#define FLASH_FCoE_PRIMARY_IMAGE_START_g3 6291456
#define FLASH_FCoE_BACKUP_IMAGE_START_g3 8388608
#define FLASH_iSCSI_BIOS_START_g3 12582912
#define FLASH_PXE_BIOS_START_g3 13107200
#define FLASH_FCoE_BIOS_START_g3 13631488
#define FLASH_NCSI_START_g3 15990784
#define IMAGE_NCSI 16
#define IMAGE_OPTION_ROM_PXE 32
#define IMAGE_OPTION_ROM_FCoE 33
#define IMAGE_OPTION_ROM_ISCSI 34
#define IMAGE_FLASHISM_JUMPVECTOR 48
#define IMAGE_FIRMWARE_iSCSI 160
#define IMAGE_FIRMWARE_FCoE 162
#define IMAGE_FIRMWARE_BACKUP_iSCSI 176
#define IMAGE_FIRMWARE_BACKUP_FCoE 178
#define IMAGE_FIRMWARE_PHY 192
#define IMAGE_REDBOOT_DIR 208
#define IMAGE_REDBOOT_CONFIG 209
#define IMAGE_UFI_DIR 210
#define IMAGE_BOOT_CODE 224
struct controller_id {
u32 vendor;
u32 device;
u32 subvendor;
u32 subdevice;
};
struct flash_comp {
unsigned long offset;
int optype;
int size;
int img_type;
};
struct image_hdr {
u32 imageid;
u32 imageoffset;
u32 imagelength;
u32 image_checksum;
u8 image_version[32];
};
struct flash_file_hdr_g2 {
u8 sign[32];
u32 cksum;
u32 antidote;
struct controller_id cont_id;
u32 file_len;
u32 chunk_num;
u32 total_chunks;
u32 num_imgs;
u8 build[24];
};
struct flash_file_hdr_g3 {
u8 sign[52];
u8 ufi_version[4];
u32 file_len;
u32 cksum;
u32 antidote;
u32 num_imgs;
u8 build[24];
u8 asic_type_rev;
u8 rsvd[31];
};
struct flash_section_hdr {
u32 format_rev;
u32 cksum;
u32 antidote;
u32 num_images;
u8 id_string[128];
u32 rsvd[4];
} __packed;
struct flash_section_hdr_g2 {
u32 format_rev;
u32 cksum;
u32 antidote;
u32 build_num;
u8 id_string[128];
u32 rsvd[8];
} __packed;
struct flash_section_entry {
u32 type;
u32 offset;
u32 pad_size;
u32 image_size;
u32 cksum;
u32 entry_point;
u16 optype;
u16 rsvd0;
u32 rsvd1;
u8 ver_data[32];
} __packed;
struct flash_section_info {
u8 cookie[32];
struct flash_section_hdr fsec_hdr;
struct flash_section_entry fsec_entry[32];
} __packed;
struct flash_section_info_g2 {
u8 cookie[32];
struct flash_section_hdr_g2 fsec_hdr;
struct flash_section_entry fsec_entry[32];
} __packed;
/****************** Firmware Flash ******************/
#define FLASHROM_OPER_FLASH 1
#define FLASHROM_OPER_SAVE 2
#define FLASHROM_OPER_REPORT 4
#define FLASHROM_OPER_PHY_FLASH 9
#define FLASHROM_OPER_PHY_SAVE 10
struct flashrom_params {
u32 op_code;
u32 op_type;
......@@ -1366,6 +1526,7 @@ enum {
PHY_TYPE_QSFP,
PHY_TYPE_KR4_40GB,
PHY_TYPE_KR2_20GB,
PHY_TYPE_TN_8022,
PHY_TYPE_DISABLED = 255
};
......@@ -1429,6 +1590,20 @@ struct be_cmd_req_set_qos {
};
/*********************** Controller Attributes ***********************/
struct mgmt_hba_attribs {
u32 rsvd0[24];
u8 controller_model_number[32];
u32 rsvd1[79];
u8 rsvd2[3];
u8 phy_port;
u32 rsvd3[13];
} __packed;
struct mgmt_controller_attrib {
struct mgmt_hba_attribs hba_attribs;
u32 rsvd0[10];
} __packed;
struct be_cmd_req_cntl_attribs {
struct be_cmd_req_hdr hdr;
};
......
......@@ -705,15 +705,17 @@ be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
if (ecmd->autoneg != adapter->phy.fc_autoneg)
return -EINVAL;
adapter->tx_fc = ecmd->tx_pause;
adapter->rx_fc = ecmd->rx_pause;
status = be_cmd_set_flow_control(adapter,
adapter->tx_fc, adapter->rx_fc);
if (status)
status = be_cmd_set_flow_control(adapter, ecmd->tx_pause,
ecmd->rx_pause);
if (status) {
dev_warn(&adapter->pdev->dev, "Pause param set failed\n");
return be_cmd_status(status);
}
return be_cmd_status(status);
adapter->tx_fc = ecmd->tx_pause;
adapter->rx_fc = ecmd->rx_pause;
return 0;
}
static int be_set_phys_id(struct net_device *netdev,
......
......@@ -171,94 +171,6 @@
#define RETRIEVE_FAT 0
#define QUERY_FAT 1
/* Flashrom related descriptors */
#define MAX_FLASH_COMP 32
#define IMAGE_TYPE_FIRMWARE 160
#define IMAGE_TYPE_BOOTCODE 224
#define IMAGE_TYPE_OPTIONROM 32
#define NUM_FLASHDIR_ENTRIES 32
#define OPTYPE_ISCSI_ACTIVE 0
#define OPTYPE_REDBOOT 1
#define OPTYPE_BIOS 2
#define OPTYPE_PXE_BIOS 3
#define OPTYPE_FCOE_BIOS 8
#define OPTYPE_ISCSI_BACKUP 9
#define OPTYPE_FCOE_FW_ACTIVE 10
#define OPTYPE_FCOE_FW_BACKUP 11
#define OPTYPE_NCSI_FW 13
#define OPTYPE_REDBOOT_DIR 18
#define OPTYPE_REDBOOT_CONFIG 19
#define OPTYPE_SH_PHY_FW 21
#define OPTYPE_FLASHISM_JUMPVECTOR 22
#define OPTYPE_UFI_DIR 23
#define OPTYPE_PHY_FW 99
#define TN_8022 13
#define FLASHROM_OPER_PHY_FLASH 9
#define FLASHROM_OPER_PHY_SAVE 10
#define FLASHROM_OPER_FLASH 1
#define FLASHROM_OPER_SAVE 2
#define FLASHROM_OPER_REPORT 4
#define FLASH_IMAGE_MAX_SIZE_g2 (1310720) /* Max firmware image size */
#define FLASH_BIOS_IMAGE_MAX_SIZE_g2 (262144) /* Max OPTION ROM image sz */
#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 (262144) /* Max Redboot image sz */
#define FLASH_IMAGE_MAX_SIZE_g3 (2097152) /* Max firmware image size */
#define FLASH_BIOS_IMAGE_MAX_SIZE_g3 (524288) /* Max OPTION ROM image sz */
#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 (1048576) /* Max Redboot image sz */
#define FLASH_NCSI_IMAGE_MAX_SIZE_g3 (262144)
#define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144
#define FLASH_NCSI_MAGIC (0x16032009)
#define FLASH_NCSI_DISABLED (0)
#define FLASH_NCSI_ENABLED (1)
#define FLASH_NCSI_BITFILE_HDR_OFFSET (0x600000)
/* Offsets for components on Flash. */
#define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 (1048576)
#define FLASH_iSCSI_BACKUP_IMAGE_START_g2 (2359296)
#define FLASH_FCoE_PRIMARY_IMAGE_START_g2 (3670016)
#define FLASH_FCoE_BACKUP_IMAGE_START_g2 (4980736)
#define FLASH_iSCSI_BIOS_START_g2 (7340032)
#define FLASH_PXE_BIOS_START_g2 (7864320)
#define FLASH_FCoE_BIOS_START_g2 (524288)
#define FLASH_REDBOOT_START_g2 (0)
#define FLASH_NCSI_START_g3 (15990784)
#define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 (2097152)
#define FLASH_iSCSI_BACKUP_IMAGE_START_g3 (4194304)
#define FLASH_FCoE_PRIMARY_IMAGE_START_g3 (6291456)
#define FLASH_FCoE_BACKUP_IMAGE_START_g3 (8388608)
#define FLASH_iSCSI_BIOS_START_g3 (12582912)
#define FLASH_PXE_BIOS_START_g3 (13107200)
#define FLASH_FCoE_BIOS_START_g3 (13631488)
#define FLASH_REDBOOT_START_g3 (262144)
#define FLASH_PHY_FW_START_g3 1310720
#define IMAGE_NCSI 16
#define IMAGE_OPTION_ROM_PXE 32
#define IMAGE_OPTION_ROM_FCoE 33
#define IMAGE_OPTION_ROM_ISCSI 34
#define IMAGE_FLASHISM_JUMPVECTOR 48
#define IMAGE_FLASH_ISM 49
#define IMAGE_JUMP_VECTOR 50
#define IMAGE_FIRMWARE_iSCSI 160
#define IMAGE_FIRMWARE_COMP_iSCSI 161
#define IMAGE_FIRMWARE_FCoE 162
#define IMAGE_FIRMWARE_COMP_FCoE 163
#define IMAGE_FIRMWARE_BACKUP_iSCSI 176
#define IMAGE_FIRMWARE_BACKUP_COMP_iSCSI 177
#define IMAGE_FIRMWARE_BACKUP_FCoE 178
#define IMAGE_FIRMWARE_BACKUP_COMP_FCoE 179
#define IMAGE_FIRMWARE_PHY 192
#define IMAGE_REDBOOT_DIR 208
#define IMAGE_REDBOOT_CONFIG 209
#define IMAGE_UFI_DIR 210
#define IMAGE_BOOT_CODE 224
/************* Rx Packet Type Encoding **************/
#define BE_UNICAST_PACKET 0
#define BE_MULTICAST_PACKET 1
......@@ -440,138 +352,3 @@ struct amap_eth_rx_compl_v1 {
struct be_eth_rx_compl {
u32 dw[4];
};
struct mgmt_hba_attribs {
u8 flashrom_version_string[32];
u8 manufacturer_name[32];
u32 supported_modes;
u32 rsvd0[3];
u8 ncsi_ver_string[12];
u32 default_extended_timeout;
u8 controller_model_number[32];
u8 controller_description[64];
u8 controller_serial_number[32];
u8 ip_version_string[32];
u8 firmware_version_string[32];
u8 bios_version_string[32];
u8 redboot_version_string[32];
u8 driver_version_string[32];
u8 fw_on_flash_version_string[32];
u32 functionalities_supported;
u16 max_cdblength;
u8 asic_revision;
u8 generational_guid[16];
u8 hba_port_count;
u16 default_link_down_timeout;
u8 iscsi_ver_min_max;
u8 multifunction_device;
u8 cache_valid;
u8 hba_status;
u8 max_domains_supported;
u8 phy_port;
u32 firmware_post_status;
u32 hba_mtu[8];
u32 rsvd1[4];
};
struct mgmt_controller_attrib {
struct mgmt_hba_attribs hba_attribs;
u16 pci_vendor_id;
u16 pci_device_id;
u16 pci_sub_vendor_id;
u16 pci_sub_system_id;
u8 pci_bus_number;
u8 pci_device_number;
u8 pci_function_number;
u8 interface_type;
u64 unique_identifier;
u32 rsvd0[5];
};
struct controller_id {
u32 vendor;
u32 device;
u32 subvendor;
u32 subdevice;
};
struct flash_comp {
unsigned long offset;
int optype;
int size;
int img_type;
};
struct image_hdr {
u32 imageid;
u32 imageoffset;
u32 imagelength;
u32 image_checksum;
u8 image_version[32];
};
struct flash_file_hdr_g2 {
u8 sign[32];
u32 cksum;
u32 antidote;
struct controller_id cont_id;
u32 file_len;
u32 chunk_num;
u32 total_chunks;
u32 num_imgs;
u8 build[24];
};
struct flash_file_hdr_g3 {
u8 sign[52];
u8 ufi_version[4];
u32 file_len;
u32 cksum;
u32 antidote;
u32 num_imgs;
u8 build[24];
u8 asic_type_rev;
u8 rsvd[31];
};
struct flash_section_hdr {
u32 format_rev;
u32 cksum;
u32 antidote;
u32 num_images;
u8 id_string[128];
u32 rsvd[4];
} __packed;
struct flash_section_hdr_g2 {
u32 format_rev;
u32 cksum;
u32 antidote;
u32 build_num;
u8 id_string[128];
u32 rsvd[8];
} __packed;
struct flash_section_entry {
u32 type;
u32 offset;
u32 pad_size;
u32 image_size;
u32 cksum;
u32 entry_point;
u16 optype;
u16 rsvd0;
u32 rsvd1;
u8 ver_data[32];
} __packed;
struct flash_section_info {
u8 cookie[32];
struct flash_section_hdr fsec_hdr;
struct flash_section_entry fsec_entry[32];
} __packed;
struct flash_section_info_g2 {
u8 cookie[32];
struct flash_section_hdr_g2 fsec_hdr;
struct flash_section_entry fsec_entry[32];
} __packed;
......@@ -3183,13 +3183,32 @@ static int be_clear(struct be_adapter *adapter)
return 0;
}
static int be_if_create(struct be_adapter *adapter, u32 *if_handle,
u32 cap_flags, u32 vf)
{
u32 en_flags;
int status;
en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |
BE_IF_FLAGS_RSS;
en_flags &= cap_flags;
status = be_cmd_if_create(adapter, cap_flags, en_flags,
if_handle, vf);
return status;
}
static int be_vfs_if_create(struct be_adapter *adapter)
{
struct be_resources res = {0};
struct be_vf_cfg *vf_cfg;
u32 cap_flags, en_flags, vf;
int status = 0;
u32 cap_flags, vf;
int status;
/* If a FW profile exists, then cap_flags are updated */
cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
BE_IF_FLAGS_MULTICAST;
......@@ -3201,18 +3220,13 @@ static int be_vfs_if_create(struct be_adapter *adapter)
cap_flags = res.if_cap_flags;
}
/* If a FW profile exists, then cap_flags are updated */
en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED |
BE_IF_FLAGS_BROADCAST |
BE_IF_FLAGS_MULTICAST);
status =
be_cmd_if_create(adapter, cap_flags, en_flags,
&vf_cfg->if_handle, vf + 1);
status = be_if_create(adapter, &vf_cfg->if_handle,
cap_flags, vf + 1);
if (status)
goto err;
return status;
}
err:
return status;
return 0;
}
static int be_vf_setup_init(struct be_adapter *adapter)
......@@ -3653,7 +3667,6 @@ int be_update_queues(struct be_adapter *adapter)
static int be_setup(struct be_adapter *adapter)
{
struct device *dev = &adapter->pdev->dev;
u32 tx_fc, rx_fc, en_flags;
int status;
be_setup_init(adapter);
......@@ -3669,13 +3682,8 @@ static int be_setup(struct be_adapter *adapter)
if (status)
goto err;
en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS;
if (adapter->function_caps & BE_FUNCTION_CAPS_RSS)
en_flags |= BE_IF_FLAGS_RSS;
en_flags = en_flags & be_if_cap_flags(adapter);
status = be_cmd_if_create(adapter, be_if_cap_flags(adapter), en_flags,
&adapter->if_handle, 0);
status = be_if_create(adapter, &adapter->if_handle,
be_if_cap_flags(adapter), 0);
if (status)
goto err;
......@@ -3708,11 +3716,14 @@ static int be_setup(struct be_adapter *adapter)
be_cmd_get_acpi_wol_cap(adapter);
be_cmd_get_flow_control(adapter, &tx_fc, &rx_fc);
status = be_cmd_set_flow_control(adapter, adapter->tx_fc,
adapter->rx_fc);
if (status)
be_cmd_get_flow_control(adapter, &adapter->tx_fc,
&adapter->rx_fc);
if (rx_fc != adapter->rx_fc || tx_fc != adapter->tx_fc)
be_cmd_set_flow_control(adapter, adapter->tx_fc,
adapter->rx_fc);
dev_info(&adapter->pdev->dev, "HW Flow control - TX:%d RX:%d\n",
adapter->tx_fc, adapter->rx_fc);
if (be_physfn(adapter))
be_cmd_set_logical_link_config(adapter,
......@@ -3751,7 +3762,7 @@ static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
static bool phy_flashing_required(struct be_adapter *adapter)
{
return (adapter->phy.phy_type == TN_8022 &&
return (adapter->phy.phy_type == PHY_TYPE_TN_8022 &&
adapter->phy.interface_type == PHY_TYPE_BASET_10GB);
}
......@@ -5060,6 +5071,10 @@ static int be_resume(struct pci_dev *pdev)
if (status)
return status;
status = be_cmd_reset_function(adapter);
if (status)
return status;
be_intr_set(adapter, true);
/* tell fw we're ready to fire cmds */
status = be_cmd_fw_init(adapter);
......
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