提交 510c0ffd 编写于 作者: J Jon Hunter 提交者: Benoit Cousson

ARM: dts: OMAP: Add counter-32k nodes

Adds the counter-32k timers nodes present in OMAP2/3/4 devices and
device-tree binding documentation for OMAP counter-32k.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
上级 fab8ad0b
OMAP Counter-32K bindings
Required properties:
- compatible: Must be "ti,omap-counter32k" for OMAP controllers
- reg: Contains timer register address range (base address and length)
- ti,hwmods: Name of the hwmod associated to the counter, which is typically
"counter_32k"
Example:
counter32k: counter@4a304000 {
compatible = "ti,omap-counter32k";
reg = <0x4a304000 0x20>;
ti,hwmods = "counter_32k";
};
......@@ -14,6 +14,12 @@
compatible = "ti,omap2420", "ti,omap2";
ocp {
counter32k: counter@48004000 {
compatible = "ti,omap-counter32k";
reg = <0x48004000 0x20>;
ti,hwmods = "counter_32k";
};
omap2420_pmx: pinmux@48000030 {
compatible = "ti,omap2420-padconf", "pinctrl-single";
reg = <0x48000030 0x0113>;
......
......@@ -14,6 +14,12 @@
compatible = "ti,omap2430", "ti,omap2";
ocp {
counter32k: counter@49020000 {
compatible = "ti,omap-counter32k";
reg = <0x49020000 0x20>;
ti,hwmods = "counter_32k";
};
omap2430_pmx: pinmux@49002030 {
compatible = "ti,omap2430-padconf", "pinctrl-single";
reg = <0x49002030 0x0154>;
......
......@@ -61,6 +61,12 @@
ranges;
ti,hwmods = "l3_main";
counter32k: counter@48320000 {
compatible = "ti,omap-counter32k";
reg = <0x48320000 0x20>;
ti,hwmods = "counter_32k";
};
intc: interrupt-controller@48200000 {
compatible = "ti,omap2-intc";
interrupt-controller;
......
......@@ -95,6 +95,12 @@
ranges;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
counter32k: counter@4a304000 {
compatible = "ti,omap-counter32k";
reg = <0x4a304000 0x20>;
ti,hwmods = "counter_32k";
};
omap4_pmx_core: pinmux@4a100040 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x4a100040 0x0196>;
......
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