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提交 4946aa9f 编写于 作者: W wangyuan46 提交者： Yang Yingliang
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rde: fixup some problems from codereview 

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

In this patch, we do some changes as below:
1.add bme/pm/sriov flr disable config
2.optimize print format
3.add fault proc of task error
Signed-off-by: Nwangyuan46 <wangyuan46@huawei.com>
Reviewed-by: Nlingmingqiang <lingmingqiang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 9a93c260
隐藏空白更改
内联 并排
Showing with 291 addition and 273 deletion
drivers/crypto/hisilicon/rde/rde.h
浏览文件 @ 4946aa9f
......@@ -45,12 +45,6 @@ struct hisi_rde {
#define RDE_MEM_SAVE_SHIFT 2
#define RDE_BUF_TYPE_SHIFT 3
#define SGL_DATA_OFFSET_SHIFT 8
#define RDE_COEF_GF_SHIFT 32
#define RDE_LBA_BLK 8
#define RDE_LBA_DWORD_CNT 5
#define DIF_CHK_GRD_CTRL_SHIFT 4
#define DIF_CHK_REF_CTRL_SHIFT 32
#define DIF_LBA_SHIFT 32
#define DIF_GEN_PAD_CTRL_SHIFT 32
#define DIF_GEN_REF_CTRL_SHIFT 35
#define DIF_GEN_APP_CTRL_SHIFT 38
......@@ -76,18 +70,26 @@ struct hisi_rde {
#define RDE_DONE_SHIFT 7
#define RDE_PER_SRC_COEF_SIZE 32
#define RDE_PER_SRC_COEF_TIMES 4
#define RDE_UPD_GN_FLAG 0x80
#define RDE_UPD_PARITY_SHIFT 7
#define RDE_TASK_TMOUT_MS 10000
#define RDE_GN_WITH_MODE(column, mode, parity) \
((u8)column + ((ACC_OPT_UPD ^ mode) ? 0 : (0x80 & (parity << 7))))
#define RDE_GN_CNT(i) (((i + 1) % 2 == 0) ? ((i + 1) >> 1) : ((i + 2) >> 1))
#define RDE_GN_FLAG(i) (((i + 1) % 2 == 0) ? 2 : 1)
#define RDE_GN_SHIFT(x) (RDE_COEF_GF_SHIFT * (x == 1 ? 1 : 0))
#define RDE_CLR_CNT(i) (((i - 1) / RDE_LBA_BLK + 1) * RDE_LBA_DWORD_CNT)
#define RDE_LBA_INFO_CNT(i) ((i % 2 == 0) ? (i >> 1) : ((i - 1) >> 1))
#define RDE_LBA_SHIFT_MSK(i) ((i % 2 == 0) ? 1 : 0)
#define RDE_GN_SHIFT(i) (32 * (i == 1 ? 1 : 0))
#define RDE_CHK_CTRL_CNT(i) ((i / 8) * 5)
#define RDE_LBA_CNT(i) ((i / 8 + 1) + \
((i % 2 == 0) ? (i >> 1) : ((i - 1) >> 1)))
#define RDE_CHK_CTRL_VALUE(grd, ref, i) \
((u64)(grd << 4 | ref) << (8 * (i % 8)))
#define RDE_LBA_SHIFT(i) (32 * ((i % 2) ^ 1))
struct hisi_rde_hw_error {
u8 status;
u32 int_msk;
const char *msg;
};
/* src data addr table, should be 64byte aligned */
struct rde_src_tbl {
......@@ -125,6 +127,7 @@ struct hisi_rde_msg {
struct raid_ec_ctrl *udata;
struct completion completion;
u32 req_id;
int result;
};
/* rde ctx structure, acc_init api can alloc and init this structure */
......@@ -148,6 +151,40 @@ struct rde_type {
u8 alg_type;
};
/* RDE hardware error status */
enum {
RDE_STATUS_NULL = 0,
RDE_BD_ADDR_NO_ALIGN = 0x2,
RDE_BD_RD_BUS_ERR = 0x3,
RDE_IO_ABORT = 0x4,
RDE_BD_ERR = 0x5,
RDE_ECC_ERR = 0x6,
RDE_SGL_ADDR_ERR = 0x7,
RDE_SGL_PARA_ERR = 0x8,
RDE_DATA_RD_BUS_ERR = 0x1c,
RDE_DATA_WR_BUS_ERR = 0x1d,
RDE_CRC_CHK_ERR = 0x1e,
RDE_REF_CHK_ERR = 0x1f,
RDE_DISK0_VERIFY = 0x20,
RDE_DISK1_VERIFY = 0x21,
RDE_DISK2_VERIFY = 0x22,
RDE_DISK3_VERIFY = 0x23,
RDE_DISK4_VERIFY = 0x24,
RDE_DISK5_VERIFY = 0x25,
RDE_DISK6_VERIFY = 0x26,
RDE_DISK7_VERIFY = 0x27,
RDE_DISK8_VERIFY = 0x28,
RDE_DISK9_VERIFY = 0x29,
RDE_DISK10_VERIFY = 0x2a,
RDE_DISK11_VERIFY = 0x2b,
RDE_DISK12_VERIFY = 0x2c,
RDE_DISK13_VERIFY = 0x2d,
RDE_DISK14_VERIFY = 0x2e,
RDE_DISK15_VERIFY = 0x2f,
RDE_DISK16_VERIFY = 0x30,
RDE_CHAN_TMOUT = 0x31,
};
/* RDE algorithm types */
enum {
MPCC = 0x00, /* EC */
......@@ -262,15 +299,27 @@ static inline void rde_table_dump(const struct hisi_rde_msg *req)
for (i = 0; i < SRC_ADDR_TABLE_NUM; i++) {
if (req->src_addr->content[i])
pr_info("src addr info[%d] content is 0x%llx\n",
pr_info("Table0 info[%d] is 0x%llx.\n",
i, req->src_addr->content[i]);
}
for (i = 0; i < SRC_DIF_TABLE_NUM; i++) {
if (req->src_tag_addr->content[i])
pr_info("Table1 info[%d] is 0x%llx.\n",
i, req->src_tag_addr->content[i]);
}
for (i = 0; i < DST_ADDR_TABLE_NUM; i++) {
if (req->dst_addr->content[i])
pr_info("dst addr info[%d] content is 0x%llx\n",
pr_info("Table2 info[%d] is 0x%llx.\n",
i, req->dst_addr->content[i]);
}
for (i = 0; i < DST_DIF_TABLE_NUM; i++) {
if (req->dst_tag_addr->content[i])
pr_info("Table3 info[%d] is 0x%llx.\n",
i, req->dst_tag_addr->content[i]);
}
}
struct hisi_rde *find_rde_device(int node);
......
drivers/crypto/hisilicon/rde/rde_api.c
浏览文件 @ 4946aa9f
......@@ -20,6 +20,39 @@
#include "rde_data.h"
#include "rde.h"
static const struct hisi_rde_hw_error rde_task_error[] = {
{.status = RDE_BD_ADDR_NO_ALIGN, .msg = "Rde bd addr no align err"},
{.status = RDE_BD_RD_BUS_ERR, .msg = "Rde bd read bus err"},
{.status = RDE_IO_ABORT, .msg = "Rde io abort err"},
{.status = RDE_BD_ERR, .msg = "Rde bd config err"},
{.status = RDE_ECC_ERR, .msg = "Rde ecc err"},
{.status = RDE_SGL_ADDR_ERR, .msg = "Rde sgl/prp read bus err"},
{.status = RDE_SGL_PARA_ERR, .msg = "Rde sgl/prp config err"},
{.status = RDE_DATA_RD_BUS_ERR, .msg = "Rde data read bus err"},
{.status = RDE_DATA_WR_BUS_ERR, .msg = "Rde data write bus err"},
{.status = RDE_CRC_CHK_ERR, .msg = "Rde data or parity disk grd err"},
{.status = RDE_REF_CHK_ERR, .msg = "Rde data or parity disk ref err"},
{.status = RDE_DISK0_VERIFY, .msg = "Rde parity disk0 err"},
{.status = RDE_DISK1_VERIFY, .msg = "Rde parity disk1 err"},
{.status = RDE_DISK2_VERIFY, .msg = "Rde parity disk2 err"},
{.status = RDE_DISK3_VERIFY, .msg = "Rde parity disk3 err"},
{.status = RDE_DISK4_VERIFY, .msg = "Rde parity disk4 err"},
{.status = RDE_DISK5_VERIFY, .msg = "Rde parity disk5 err"},
{.status = RDE_DISK6_VERIFY, .msg = "Rde parity disk6 err"},
{.status = RDE_DISK7_VERIFY, .msg = "Rde parity disk7 err"},
{.status = RDE_DISK8_VERIFY, .msg = "Rde parity disk8 err"},
{.status = RDE_DISK9_VERIFY, .msg = "Rde parity disk9 err"},
{.status = RDE_DISK10_VERIFY, .msg = "Rde parity disk10 err"},
{.status = RDE_DISK11_VERIFY, .msg = "Rde parity disk11 err"},
{.status = RDE_DISK12_VERIFY, .msg = "Rde parity disk12 err"},
{.status = RDE_DISK13_VERIFY, .msg = "Rde parity disk13 err"},
{.status = RDE_DISK14_VERIFY, .msg = "Rde parity disk14 err"},
{.status = RDE_DISK15_VERIFY, .msg = "Rde parity disk15 err"},
{.status = RDE_DISK16_VERIFY, .msg = "Rde parity disk16 err"},
{.status = RDE_CHAN_TMOUT, .msg = "Rde channel timeout err"},
{ /* sentinel */ }
};
static u32 rde_matrix_len(u8 alg_type, u8 cm_len)
{
u32 len = 0;
......@@ -33,7 +66,7 @@ static u32 rde_matrix_len(u8 alg_type, u8 cm_len)
RDE_PER_SRC_COEF_TIMES * cm_len);
break;
default:
pr_err("[%s] err alg type.\n", __func__);
pr_err("[%s] Err alg type.\n", __func__);
break;
}
......@@ -55,7 +88,7 @@ static int rde_sgl_src_scatterlist_release(struct pci_dev *pdev,
rde_ctx->smmu_state);
if (ret) {
dev_err(&pdev->dev,
"[%s]src[%d] fail.\n", __func__, i);
"[%s] Src[%d] fail.\n", __func__, i);
return ret;
}
}
......@@ -79,7 +112,7 @@ static int rde_sgl_dst_scatterlist_release(struct pci_dev *pdev,
rde_ctx->smmu_state);
if (ret) {
dev_err(&pdev->dev,
"[%s]dst[%d] fail.\n", __func__, i);
"[%s] Dst[%d] fail.\n", __func__, i);
return ret;
}
}
......@@ -165,13 +198,13 @@ static void rde_bd_addr_release(struct pci_dev *pdev,
rde_ctx, req, src_num);
if (ret)
dev_err(&pdev->dev,
"[%s]src release fail.\n", __func__);
"[%s] Src release fail.\n", __func__);
ret = rde_sgl_dst_scatterlist_release(pdev,
rde_ctx, req, dst_num);
if (ret)
dev_err(&pdev->dev,
"[%s]dst release fail.\n", __func__);
"[%s] Dst release fail.\n", __func__);
}
}
......@@ -180,17 +213,17 @@ static int rde_cm_len_check(struct device *dev, u8 alg_type, u8 cm_len)
if (alg_type == MPCC) {
if (unlikely(cm_len > RDE_MPCC_MAX_SRC_NUM)) {
dev_err(dev,
"error!mpcc cmlen should smaller than 17.\n");
"Error!mpcc cmlen should smaller than 17.\n");
return -EINVAL;
}
} else if (alg_type == PQ_FLEXEC) {
if (unlikely(cm_len > RDE_FLEXEC_MAX_SRC_NUM)) {
dev_err(dev,
"error!flexec cmlen should smaller than 32.\n");
"Error!flexec cmlen should smaller than 32.\n");
return -EINVAL;
}
} else {
dev_err(dev, "no support alg_type.\n");
dev_err(dev, "No support alg_type.\n");
return -EINVAL;
}
......@@ -204,32 +237,32 @@ static int rde_io_para_check(struct acc_ctx *ctx,
struct hisi_rde_ctx *rde_ctx;
if (unlikely(!ctx || !req || op_type >= ACC_OPT_RAID_BUTT)) {
pr_err("[%s]invalid input para.\n", __func__);
pr_err("[%s] Invalid input para.\n", __func__);
return -EINVAL;
}
rde_ctx = (struct hisi_rde_ctx *)ctx->inner;
if (unlikely(!rde_ctx)) {
pr_err("[%s]rde_ctx without init.\n", __func__);
return -EIO;
pr_err("[%s] Rde_ctx without init.\n", __func__);
return -EINVAL;
}
if ((rde_ctx->addr_type == VA_FROM_HIGHMEM_ZONE &&
req->buf_type != ACC_BUF_TYPE_PBUFFER) ||
(rde_ctx->addr_type == VA_FROM_HIGHMEM_ZONE &&
rde_ctx->smmu_state)) {
dev_err(rde_ctx->dev, "error!invalid addr & buf type.\n");
dev_err(rde_ctx->dev, "Error!invalid addr & buf type.\n");
return -EINVAL;
}
if (unlikely(!req->input_block || !req->data_len)) {
dev_err(rde_ctx->dev, "error!invalid input_block.\n");
dev_err(rde_ctx->dev, "Error!invalid input_block.\n");
return -EINVAL;
}
if (unlikely(!req->src_data || !req->dst_data || !req->coe_matrix)) {
dev_err(rde_ctx->dev, "error!input addr is NULL.\n");
return -EFAULT;
dev_err(rde_ctx->dev, "Error!input addr is NULL.\n");
return -EINVAL;
}
return rde_cm_len_check(rde_ctx->dev, alg_type, req->cm_len);
......@@ -240,24 +273,18 @@ static void src_dif_package(struct hisi_rde_msg *req)
u32 i;
u32 lba_info_cnt = 0;
u32 chk_info_cnt = 0;
u32 cur_cnt1 = 0;
u32 cur_cnt2 = 0;
struct raid_ec_ctrl *udata = req->udata;
u8 grd = udata->src_dif.ctrl.verify.grd_verify_type;
u8 ref = udata->src_dif.ctrl.verify.ref_verify_type;
u32 num = udata->src_num;
for (i = 0; i < num; i++) {
chk_info_cnt = i / RDE_LBA_BLK + 1;
lba_info_cnt = RDE_LBA_INFO_CNT(i);
cur_cnt1 = (i / RDE_LBA_BLK) * RDE_LBA_DWORD_CNT;
cur_cnt2 = chk_info_cnt + lba_info_cnt;
req->src_tag_addr->content[cur_cnt1] |=
((u64)(grd << DIF_CHK_GRD_CTRL_SHIFT | ref) <<
(RDE_LBA_BLK * (i % RDE_LBA_BLK)));
req->src_tag_addr->content[cur_cnt2] |=
((u64)udata->src_dif.priv <<
(DIF_LBA_SHIFT * RDE_LBA_SHIFT_MSK(i)));
chk_info_cnt = RDE_CHK_CTRL_CNT(i);
lba_info_cnt = RDE_LBA_CNT(i);
req->src_tag_addr->content[chk_info_cnt] |=
RDE_CHK_CTRL_VALUE(grd, ref, i);
req->src_tag_addr->content[lba_info_cnt] |=
((u64)udata->src_dif.priv << RDE_LBA_SHIFT(i));
}
}
......@@ -287,11 +314,9 @@ static void dst_dif_package(struct hisi_rde_msg *req)
DIF_GEN_GRD_CTRL_SHIFT);
req->dst_tag_addr->content[i] |= (u64)udata->dst_dif.priv;
req->dst_tag_addr->content[i] |=
((u64)(udata->dst_dif.app) <<
DIF_APP_TAG_SHIFT);
((u64)(udata->dst_dif.app) << DIF_APP_TAG_SHIFT);
req->dst_tag_addr->content[i] |=
((u64)(udata->dst_dif.ver) <<
DIF_VERSION_SHIFT);
((u64)(udata->dst_dif.ver) << DIF_VERSION_SHIFT);
}
}
......@@ -313,7 +338,7 @@ static int rde_disk_sgl_addr_translation(struct pci_dev *pdev,
*content = (u64)sgl_addr;
return 0;
default:
dev_err(rde_ctx->dev, "[%s] invalid addr type.\n", __func__);
dev_err(rde_ctx->dev, "[%s] Invalid addr type.\n", __func__);
return -EINVAL;
}
......@@ -335,19 +360,18 @@ static int sgl_src_addr_package(struct pci_dev *pdev,
u32 gn_cnt, gn_flag, cur_cnt;
struct raid_ec_ctrl *ctrl = req->udata;
u32 num = ctrl->src_num;
struct rde_sgl *sgl_src = (struct rde_sgl *)(ctrl->src_data);
struct rde_sgl *rde_sgl_src = (struct rde_sgl *)(ctrl->src_data);
if (unlikely(!sgl_src->ctrl)) {
dev_err(rde_ctx->dev, "[%s]sg_hw is NULL\n", __func__);
if (unlikely(!rde_sgl_src->ctrl)) {
dev_err(rde_ctx->dev, "[%s] Sgl_hw is NULL.\n", __func__);
return -EFAULT;
}
memset(&req->src_record[0], 0, num * sizeof(u64));
for (i = 0; i < num; i++) {
gn = (u8)(sgl_src->column) +
((ACC_OPT_UPD ^ mode) ? 0 : (RDE_UPD_GN_FLAG &
(sgl_src->parity << RDE_UPD_PARITY_SHIFT)));
sgl_data = (sgl_src->buf_offset <<
gn = RDE_GN_WITH_MODE(rde_sgl_src->column,
mode, rde_sgl_src->parity);
sgl_data = (rde_sgl_src->buf_offset <<
SGL_DATA_OFFSET_SHIFT) | (u32)gn;
gn_cnt = RDE_GN_CNT(i) + i;
gn_flag = RDE_GN_FLAG(i);
......@@ -355,7 +379,7 @@ static int sgl_src_addr_package(struct pci_dev *pdev,
req->src_addr->content[cur_cnt] |=
((u64)sgl_data << RDE_GN_SHIFT(gn_flag));
ret = rde_disk_sgl_addr_translation(pdev, rde_ctx,
sgl_src->ctrl, &req->src_addr->content[gn_cnt],
rde_sgl_src->ctrl, &req->src_addr->content[gn_cnt],
&req->src_record[i]);
if (ret) {
r_ret = rde_sgl_src_scatterlist_release(pdev,
......@@ -365,7 +389,7 @@ static int sgl_src_addr_package(struct pci_dev *pdev,
return ret;
}
sgl_src++;
rde_sgl_src++;
}
return 0;
......@@ -382,18 +406,18 @@ static int sgl_dst_addr_package(struct pci_dev *pdev,
u32 gn_cnt, gn_flag, cur_cnt;
struct raid_ec_ctrl *ctrl = req->udata;
u32 num = ctrl->dst_num;
struct rde_sgl *sgl_dst = (struct rde_sgl *)(ctrl->dst_data);
struct rde_sgl *rde_sgl_dst = (struct rde_sgl *)(ctrl->dst_data);
if (unlikely(!sgl_dst->ctrl)) {
dev_err(rde_ctx->dev, "[%s]dst sgl_addr->ctrl is NULL\n",
if (unlikely(!rde_sgl_dst->ctrl)) {
dev_err(rde_ctx->dev, "[%s] Dst sgl_addr->ctrl is NULL.\n",
__func__);
return -EFAULT;
}
memset(&req->dst_record[0], 0, num * sizeof(u64));
for (i = 0; i < num; i++) {
gn = (u8)(sgl_dst->column);
sgl_data = (sgl_dst->buf_offset <<
gn = (u8)(rde_sgl_dst->column);
sgl_data = (rde_sgl_dst->buf_offset <<
SGL_DATA_OFFSET_SHIFT) | (u32)gn;
gn_cnt = RDE_GN_CNT(i) + i;
gn_flag = RDE_GN_FLAG(i);
......@@ -401,7 +425,7 @@ static int sgl_dst_addr_package(struct pci_dev *pdev,
req->dst_addr->content[cur_cnt] |= ((u64)sgl_data <<
RDE_GN_SHIFT(gn_flag));
ret = rde_disk_sgl_addr_translation(pdev, rde_ctx,
sgl_dst->ctrl, &req->dst_addr->content[gn_cnt],
rde_sgl_dst->ctrl, &req->dst_addr->content[gn_cnt],
&req->dst_record[i]);
if (ret) {
r_ret = rde_sgl_dst_scatterlist_release(pdev,
......@@ -411,7 +435,7 @@ static int sgl_dst_addr_package(struct pci_dev *pdev,
return ret;
}
sgl_dst++;
rde_sgl_dst++;
}
return 0;
......@@ -434,12 +458,12 @@ static int rde_disk_pbuf_addr_translation(struct pci_dev *pdev,
*content = (u64)addr;
return 0;
default:
dev_err(rde_ctx->dev, "[%s] invalid addr type.\n", __func__);
dev_err(rde_ctx->dev, "[%s] Invalid addr type.\n", __func__);
return -EINVAL;
}
if (unlikely(!pa)) {
dev_err(rde_ctx->dev, "[%s] addr map fail.\n", __func__);
dev_err(rde_ctx->dev, "[%s] Addr map fail.\n", __func__);
return -EFAULT;
}
......@@ -460,12 +484,11 @@ static int pbuf_src_addr_package(struct pci_dev *pdev,
struct raid_ec_ctrl *ctrl = req->udata;
u32 data_len_nbytes = ctrl->data_len;
u32 num = ctrl->src_num;
struct rde_pbuf *pbuf_src = (struct rde_pbuf *)(ctrl->src_data);
struct rde_pbuf *rde_pbuf_src = (struct rde_pbuf *)(ctrl->src_data);
for (i = 0; i < num; i++) {
gn = (u8)pbuf_src->column +
((ACC_OPT_UPD ^ mode) ? 0 : (RDE_UPD_GN_FLAG &
(pbuf_src->parity << RDE_UPD_PARITY_SHIFT)));
gn = RDE_GN_WITH_MODE(rde_pbuf_src->column,
mode, rde_pbuf_src->parity);
gn_cnt = RDE_GN_CNT(i) + i;
gn_flag = RDE_GN_FLAG(i);
cur_cnt = gn_cnt - gn_flag;
......@@ -473,13 +496,13 @@ static int pbuf_src_addr_package(struct pci_dev *pdev,
RDE_GN_SHIFT(gn_flag));
ret = rde_disk_pbuf_addr_translation(pdev, rde_ctx,
&req->src_addr->content[gn_cnt],
pbuf_src->pbuf, data_len_nbytes);
rde_pbuf_src->pbuf, data_len_nbytes);
if (ret) {
rde_pbuf_src_addr_unmap(pdev, rde_ctx, req, i);
return ret;
}
pbuf_src++;
rde_pbuf_src++;
}
return 0;
......@@ -496,10 +519,10 @@ static int pbuf_dst_addr_package(struct pci_dev *pdev,
struct raid_ec_ctrl *ctrl = req->udata;
u32 num = ctrl->dst_num;
u32 data_len_nbytes = ctrl->data_len;
struct rde_pbuf *pbuf_dst = (struct rde_pbuf *)(ctrl->dst_data);
struct rde_pbuf *rde_pbuf_dst = (struct rde_pbuf *)(ctrl->dst_data);
for (i = 0; i < num; i++) {
gf_coef = (u8)pbuf_dst->column;
gf_coef = (u8)rde_pbuf_dst->column;
gf_cnt = RDE_GN_CNT(i) + i;
gf_flag = RDE_GN_FLAG(i);
cur_cnt = gf_cnt - gf_flag;
......@@ -507,13 +530,13 @@ static int pbuf_dst_addr_package(struct pci_dev *pdev,
RDE_GN_SHIFT(gf_flag));
ret = rde_disk_pbuf_addr_translation(pdev, rde_ctx,
&req->dst_addr->content[gf_cnt],
pbuf_dst->pbuf, data_len_nbytes);
rde_pbuf_dst->pbuf, data_len_nbytes);
if (ret) {
rde_pbuf_dst_addr_unmap(pdev, rde_ctx, req, i);
return ret;
}
pbuf_dst++;
rde_pbuf_dst++;
}
return 0;
......@@ -529,12 +552,12 @@ static int hisi_rde_fill_addr_tlb(struct pci_dev *pdev,
if (type->buf_mode == PBUF) {
ret = pbuf_src_addr_package(pdev, rde_ctx, req, type->alg_mode);
if (ret) {
dev_err(&pdev->dev, "pbuf src addr package fail.\n");
dev_err(&pdev->dev, "Pbuf src addr package fail.\n");
return ret;
}
ret = pbuf_dst_addr_package(pdev, rde_ctx, req);
if (ret) {
dev_err(&pdev->dev, "pbuf dst addr package fail.\n");
dev_err(&pdev->dev, "Pbuf dst addr package fail.\n");
rde_pbuf_src_addr_unmap(pdev, rde_ctx, req,
req->udata->src_num);
return ret;
......@@ -542,12 +565,12 @@ static int hisi_rde_fill_addr_tlb(struct pci_dev *pdev,
} else if (type->buf_mode == SGL) {
ret = sgl_src_addr_package(pdev, rde_ctx, req, type->alg_mode);
if (ret) {
dev_err(&pdev->dev, "sgl src addr package fail.\n");
dev_err(&pdev->dev, "Sgl src addr package fail.\n");
return ret;
}
ret = sgl_dst_addr_package(pdev, rde_ctx, req);
if (ret) {
dev_err(&pdev->dev, "sgl dst addr package fail.\n");
dev_err(&pdev->dev, "Sgl dst addr package fail.\n");
r_ret = rde_sgl_src_scatterlist_release(pdev, rde_ctx,
req, req->udata->src_num);
if (r_ret)
......@@ -555,7 +578,7 @@ static int hisi_rde_fill_addr_tlb(struct pci_dev *pdev,
return ret;
}
} else {
dev_err(&pdev->dev, "[%s] invalid buf type.\n", __func__);
dev_err(&pdev->dev, "[%s] Invalid buf type.\n", __func__);
return -EINVAL;
}
......@@ -575,7 +598,7 @@ static int rde_cm_addr_translation(struct pci_dev *pdev,
(size_t)matrix_len, rde_ctx->smmu_state);
if (unlikely(!pa)) {
dev_err(rde_ctx->dev,
"[%s]coe_matrix virt to phys fail.\n",
"[%s] Coe_matrix virt to phys fail.\n",
__func__);
return -EFAULT;
}
......@@ -644,10 +667,7 @@ int hisi_rde_fill_sqe(struct hisi_rde_ctx *rde_ctx, struct hisi_rde_msg *req,
src_dif_package(req);
dst_dif_package(req);
}
#ifdef DEBUG
rde_bd_dump(bd);
rde_table_dump(req);
#endif
return 0;
}
......@@ -661,12 +681,12 @@ static int hisi_rde_alloc_req_id(struct hisi_rde_ctx *rde_ctx)
req_id = find_first_zero_bit(rde_ctx->req_bitmap, rde_ctx->session_num);
if ((u32)req_id >= rde_ctx->session_num) {
spin_unlock_irqrestore(&rde_ctx->req_lock, flags);
dev_err(dev, "[%s]no free req id.\n", __func__);
dev_err(dev, "[%s] No free req id.\n", __func__);
return -EBUSY;
}
set_bit(req_id, rde_ctx->req_bitmap);
spin_unlock_irqrestore(&rde_ctx->req_lock, flags);
dev_dbg(dev, "alloc_id is %d.\n", req_id);
dev_dbg(dev, "Alloc_id is %d.\n", req_id);
return req_id;
}
......@@ -675,12 +695,35 @@ static void hisi_rde_free_req_id(struct hisi_rde_ctx *rde_ctx, int req_id)
{
unsigned long flags;
dev_dbg(rde_ctx->dev, "free_id is %d.\n", req_id);
dev_dbg(rde_ctx->dev, "Free_id is %d.\n", req_id);
spin_lock_irqsave(&rde_ctx->req_lock, flags);
clear_bit(req_id, rde_ctx->req_bitmap);
spin_unlock_irqrestore(&rde_ctx->req_lock, flags);
}
static int rde_task_error_log(struct pci_dev *pdev, u8 err_sts)
{
const struct hisi_rde_hw_error *err = rde_task_error;
while (err->msg) {
if (err_sts == err->status) {
dev_err_ratelimited(&pdev->dev,
"[%s] [Error status=0x%x] found.\n",
err->msg, err->status);
break;
}
err++;
}
if (err_sts < RDE_CRC_CHK_ERR || err_sts > RDE_DISK16_VERIFY)
return ACC_INVALID_PARAM;
else if (err_sts >= RDE_CRC_CHK_ERR && err_sts <= RDE_REF_CHK_ERR)
return ACC_RDE_DIF_ERR;
else
return ACC_RDE_DISK_VERIFY_ERR;
}
static void rde_cb(struct hisi_qp *qp, void *resp)
{
struct hisi_rde_sqe *wb_sqe = (struct hisi_rde_sqe *)resp;
......@@ -690,28 +733,28 @@ static void rde_cb(struct hisi_qp *qp, void *resp)
struct pci_dev *pdev = qp->qm->pdev;
u8 alg_type = wb_sqe->op_type & RDE_ALG_TYPE_MSK;
u8 buf_mode = wb_sqe->op_type & RDE_BUF_TYPE_MSK;
struct hisi_rde_msg *req;
struct raid_ec_ctrl *ctrl;
u8 result;
u8 err_status;
ctrl = rde_ctx->req_list[req_id].udata;
result = wb_sqe->status;
req = &rde_ctx->req_list[req_id];
ctrl = req->udata;
err_status = wb_sqe->status & RDE_STATUS_MSK;
if (wb_sqe->status != RDE_TASK_DONE_STATUS) {
dev_err(&pdev->dev, "task done flag is 0x%x, err status is 0x%x.\n",
(wb_sqe->status >> RDE_DONE_SHIFT) & RDE_DONE_MSK,
(wb_sqe->status) & RDE_STATUS_MSK);
req->result = rde_task_error_log(pdev, err_status);
rde_bd_dump(wb_sqe);
rde_table_dump(req);
}
if (ctx->cb) {
if (rde_ctx->addr_type != PA_PASS_THROUGH) {
rde_cm_addr_unmap(pdev, wb_sqe, alg_type, rde_ctx);
rde_bd_addr_release(pdev, rde_ctx,
&rde_ctx->req_list[req_id], buf_mode);
rde_bd_addr_release(pdev, rde_ctx, req, buf_mode);
}
hisi_rde_free_req_id(rde_ctx, (int)req_id);
ctx->cb((void *)ctx, (void *)ctrl,
(int)(result & RDE_STATUS_MSK), ctrl->data_len);
req->result, ctrl->data_len);
} else
complete(&rde_ctx->req_list[req_id].completion);
}
......@@ -745,11 +788,12 @@ int hisi_rde_io_proc(struct acc_ctx *ctx, struct raid_ec_ctrl *ctrl,
req = &rde_ctx->req_list[id];
req->req_id = (u32)id;
req->udata = ctrl;
req->result = 0;
init_completion(&req->completion);
ret = hisi_rde_fill_sqe(rde_ctx, req, &type);
if (ret) {
dev_err(rde_ctx->dev, "[%s]bd package fail.\n", __func__);
dev_err(rde_ctx->dev, "[%s] Package sqe failed.\n", __func__);
goto req_free;
}
......@@ -766,10 +810,13 @@ int hisi_rde_io_proc(struct acc_ctx *ctx, struct raid_ec_ctrl *ctrl,
if (wait_for_completion_timeout(&req->completion,
msecs_to_jiffies(RDE_TASK_TMOUT_MS)) == 0) {
dev_err(rde_ctx->dev, "sync mode task timeout.\n");
dev_err_ratelimited(rde_ctx->dev, "Sync mode task timeout.\n");
ret = -ETIME;
goto addr_unmap;
}
ret = req->result;
addr_unmap:
if (rde_ctx->addr_type != PA_PASS_THROUGH) {
rde_cm_addr_unmap(pdev, &req->sqe, type.alg_type, rde_ctx);
......@@ -820,7 +867,7 @@ static int hisi_rde_tbl_init(struct device *dev, struct hisi_rde_msg *req)
(size_t)sizeof(struct rde_src_tbl),
&req->src_dma_addr, GFP_KERNEL);
if (!req->src_addr) {
dev_err(dev, "[%s]Fail to alloc rde_src_tlb.\n", __func__);
dev_err(dev, "[%s] Alloc rde_src_tlb failed.\n", __func__);
return -ENOMEM;
}
......@@ -828,7 +875,7 @@ static int hisi_rde_tbl_init(struct device *dev, struct hisi_rde_msg *req)
(size_t)sizeof(struct rde_dst_tbl),
&req->dst_dma_addr, GFP_KERNEL);
if (!req->dst_addr) {
dev_err(dev, "[%s]Fail to alloc rde_dst_tlb.\n", __func__);
dev_err(dev, "[%s] Alloc rde_dst_tlb failed.\n", __func__);
return -ENOMEM;
}
......@@ -836,7 +883,7 @@ static int hisi_rde_tbl_init(struct device *dev, struct hisi_rde_msg *req)
(size_t)sizeof(struct rde_src_tag_tbl),
&req->src_tag_dma_addr, GFP_KERNEL);
if (!req->src_tag_addr) {
dev_err(dev, "[%s]Fail to alloc rde_src_tag_tlb.\n", __func__);
dev_err(dev, "[%s] Alloc rde_src_tag_tlb failed.\n", __func__);
return -ENOMEM;
}
......@@ -844,7 +891,7 @@ static int hisi_rde_tbl_init(struct device *dev, struct hisi_rde_msg *req)
(size_t)sizeof(struct rde_dst_tag_tbl),
&req->dst_tag_dma_addr, GFP_KERNEL);
if (!req->dst_tag_addr) {
dev_err(dev, "[%s]Fail to alloc rde_dst_tag_tlb.\n", __func__);
dev_err(dev, "[%s] Alloc rde_dst_tag_tlb failed.\n", __func__);
return -ENOMEM;
}
......@@ -854,7 +901,7 @@ static int hisi_rde_tbl_init(struct device *dev, struct hisi_rde_msg *req)
static void hisi_rde_tbl_deinit(struct device *dev, struct hisi_rde_msg *req)
{
if (!dev || !req) {
pr_info("[%s][%d] invalid para.\n", __func__, __LINE__);
pr_err("[%s][%d] Invalid para.\n", __func__, __LINE__);
return;
}
......@@ -881,7 +928,6 @@ static void hisi_rde_tbl_deinit(struct device *dev, struct hisi_rde_msg *req)
req->dst_tag_addr, req->dst_tag_dma_addr);
req->dst_tag_addr = NULL;
}
}
static void hisi_rde_session_init(struct hisi_rde_ctx *rde_ctx)
......@@ -946,33 +992,33 @@ int acc_init(struct acc_ctx *ctx)
int ret;
if (unlikely(!ctx)) {
pr_err("[%s]acc_ctx is NULL.\n", __func__);
pr_err("[%s] Acc_ctx is NULL.\n", __func__);
return -EINVAL;
}
hisi_rde = find_rde_device(cpu_to_node(smp_processor_id()));
if (unlikely(!hisi_rde)) {
pr_err("[%s]Fail to find proper RDE device.\n", __func__);
pr_err("[%s]Can not find proper RDE device.\n", __func__);
return -ENODEV;
}
/* alloc inner private struct */
rde_ctx = kzalloc(sizeof(*rde_ctx), GFP_KERNEL);
if (unlikely(!rde_ctx)) {
pr_err("[%s]Fail to alloc rde_ctx.\n", __func__);
pr_err("[%s] Alloc rde_ctx failed.\n", __func__);
return -ENOMEM;
}
ctx->inner = (void *)rde_ctx;
qm = &hisi_rde->qm;
if (unlikely(!qm->pdev)) {
pr_err("[%s]pdev is NULL.\n", __func__);
pr_err("[%s] Pdev is NULL.\n", __func__);
return -ENODEV;
}
rde_ctx->dev = &qm->pdev->dev;
ret = hisi_rde_create_qp(qm, ctx, 0, 0);
if (ret) {
dev_err(rde_ctx->dev, "[%s]Fail to create qp.\n", __func__);
dev_err(rde_ctx->dev, "[%s] Create qp failed.\n", __func__);
goto qp_err;
}
......@@ -982,12 +1028,10 @@ int acc_init(struct acc_ctx *ctx)
hisi_rde_session_init(rde_ctx);
ret = hisi_rde_ctx_init(rde_ctx, (int)rde_ctx->session_num);
if (ret) {
dev_err(rde_ctx->dev, "[%s]Fail to init rde ctx.\n", __func__);
dev_err(rde_ctx->dev, "[%s] Init rde ctx failed.\n", __func__);
goto ctx_err;
}
dev_info_ratelimited(rde_ctx->dev, "[%s]smmu state is %d, addr_type is %d.\n",
__func__, rde_ctx->smmu_state, rde_ctx->addr_type);
return 0;
ctx_err:
......@@ -1005,22 +1049,22 @@ int acc_clear(struct acc_ctx *ctx)
u32 i;
if (unlikely(!ctx)) {
pr_err("[%s]acc_ctx is NULL.\n", __func__);
pr_err("[%s] Acc_ctx is NULL.\n", __func__);
return -EINVAL;
}
rde_ctx = (struct hisi_rde_ctx *)ctx->inner;
if (unlikely(!rde_ctx)) {
pr_err("[%s]rde ctx is NULL.\n", __func__);
return -EIO;
pr_err("[%s] Rde ctx is NULL.\n", __func__);
return -EINVAL;
}
if (unlikely(!rde_ctx->dev)) {
pr_err("[%s] dev is NULL.\n", __func__);
return -ENODEV;
pr_err("[%s] Dev is NULL.\n", __func__);
return -EINVAL;
}
for (i = 0; i < rde_ctx->session_num; i++)
for (i = 0; i < rde_ctx->session_num; i++)
hisi_rde_tbl_deinit(rde_ctx->dev, &rde_ctx->req_list[i]);
kfree(rde_ctx->req_bitmap);
......@@ -1032,7 +1076,6 @@ int acc_clear(struct acc_ctx *ctx)
mutex_lock(rde_ctx->rde_dev->rde_list_lock);
rde_ctx->rde_dev->q_ref = rde_ctx->rde_dev->q_ref - 1;
mutex_unlock(rde_ctx->rde_dev->rde_list_lock);
dev_dbg(rde_ctx->dev, "[%s] finish.\n", __func__);
kfree(rde_ctx);
ctx->inner = NULL;
......@@ -1043,7 +1086,7 @@ EXPORT_SYMBOL(acc_clear);
int acc_setup_callback(struct acc_ctx *ctx, acc_callback cb)
{
if (!ctx) {
pr_err("[%s]hisi_rde acc_ctx is NULL.\n", __func__);
pr_err("[%s] Hisi_rde acc_ctx is NULL.\n", __func__);
return -EINVAL;
}
......@@ -1053,54 +1096,6 @@ int acc_setup_callback(struct acc_ctx *ctx, acc_callback cb)
}
EXPORT_SYMBOL(acc_setup_callback);
int acc_set_pi_crc_seed(uint16_t seed)
{
struct hisi_rde *hisi_rde;
hisi_rde = find_rde_device(cpu_to_node(smp_processor_id()));
if (!hisi_rde) {
pr_err("[%s]Fail to find proper RDE device!\n", __func__);
return -ENODEV;
}
writel((u32)seed, hisi_rde->qm.io_base + RDE_CRC16_IV);
return 0;
}
EXPORT_SYMBOL(acc_set_pi_crc_seed);
int acc_set_prp_mem_page_size(uint32_t page_size_byte)
{
struct hisi_rde *hisi_rde;
hisi_rde = find_rde_device(cpu_to_node(smp_processor_id()));
if (!hisi_rde) {
pr_err("[%s]Fail to find proper RDE device!\n", __func__);
return -ENODEV;
}
writel(page_size_byte, hisi_rde->qm.io_base + RDE_PRP_PAGE_SIZE);
return 0;
}
EXPORT_SYMBOL(acc_set_prp_mem_page_size);
int acc_set_sge_offset_from_sgl(uint32_t offset_byte)
{
struct hisi_rde *hisi_rde;
hisi_rde = find_rde_device(cpu_to_node(smp_processor_id()));
if (!hisi_rde) {
pr_err("[%s]Fail to find proper RDE device!\n", __func__);
return -ENODEV;
}
writel(offset_byte, hisi_rde->qm.io_base + RDE_SGL_SGE_OFFSET);
return 0;
}
EXPORT_SYMBOL(acc_set_sge_offset_from_sgl);
int acc_do_flexec_asyn(struct acc_ctx *ctx, struct raid_ec_ctrl *ctrl,
uint8_t op_type)
{
......
drivers/crypto/hisilicon/rde/rde_api.h
浏览文件 @ 4946aa9f
......@@ -308,7 +308,7 @@ struct acc_dif {
* @input_block: number of sector
* @data_len: data len of per disk, block_size (with dif)* input_block
* @buf_type: denoted by ACC_BUF_TYPE_E
* @src_dif��dif information of source disks
* @src_dif£»dif information of source disks
* @dst_dif: dif information of dest disks
* @cm_load: coe_matrix reload control, 0: do not load, 1: load
* @cm_len: length of loaded coe_matrix, equal to src_num
......@@ -361,42 +361,14 @@ struct acc_ctx {
};
/**
*
* @brief set T10 CRC seed.
*
* @param [in] seed T10 CRC seed.
* @retval 0 is success, else is a negative number that is error code.
*
* @note
*
* @brief return value.
*/
int acc_set_pi_crc_seed(uint16_t seed);
/**
*
* @brief set the PRP page size.
*
* @param [in] page_size typical values: 4096 bytes, 8192 bytes.
* @retval 0 is success, else is a negative number that is error code.
*
* @note
* Not supported yet
*
*/
int acc_set_prp_mem_page_size(uint32_t page_size_byte);
/**
*
* @brief set the offset of SGE related to SGL.
*
* @param [in] offset typical values: 32 bytes, 64 bytes.
* @retval 0 is success, else is a negative number that is error code.
*
* @note
* Not supported yet
*
*/
int acc_set_sge_offset_from_sgl(uint32_t offset_byte);
enum ACC_STATUS_E {
ACC_SUCCESS = 0,
ACC_INVALID_PARAM = (-103), /*!< parameter error */
ACC_RDE_DIF_ERR = (-113), /*!< Input or Output dif check error */
ACC_RDE_DISK_VERIFY_ERR = (-114) /*!< Output data verify error */
};
/**
*
......
drivers/crypto/hisilicon/rde/rde_data.c
浏览文件 @ 4946aa9f
......@@ -23,7 +23,7 @@ static inline u32 sgl_addr_cnt(struct sgl_hw *sgl)
struct sgl_hw *cur_sgl = sgl;
if (!sgl) {
pr_err("[%s] sgl address is NULL", __func__);
pr_err("[%s] Sgl address is NULL.\n", __func__);
return 0;
}
......@@ -45,22 +45,22 @@ int acc_sgl_dump(struct sgl_hw *data)
struct sgl_entry_hw *entry;
if (unlikely(!data->entry_sum_in_sgl)) {
pr_err("error! The entrysum of sgl is zero.\n");
pr_err("Error! The entrysum of sgl is zero.\n");
return -EINVAL;
}
cnt_entries = sgl_addr_cnt(data);
pr_info("sgl entries:%d\n", cnt_entries);
pr_info("Sgl entries:%d.\n", cnt_entries);
for (cur_sgl = data; cur_sgl; ) {
pr_info("sgl addr: 0x%pK\n", cur_sgl);
pr_info("nextSgl: 0x%pK\n", cur_sgl->next);
pr_info("entrySumInChain: %u\n", cur_sgl->entry_sum_in_chain);
pr_info("entrySumInSgl: %u\n", cur_sgl->entry_sum_in_sgl);
pr_info("Sgl addr: 0x%pK.\n", cur_sgl);
pr_info("NextSgl: 0x%pK.\n", cur_sgl->next);
pr_info("EntrySumInChain: %u.\n", cur_sgl->entry_sum_in_chain);
pr_info("EntrySumInSgl: %u.\n", cur_sgl->entry_sum_in_sgl);
entry = cur_sgl->entries;
for (i = 0; (i < cur_sgl->entry_sum_in_sgl &&
entry->buf); i++) {
pr_info("entries[%d]:addr = 0x%pK\n", i, entry->buf);
pr_info("Entries[%d]:addr = 0x%pK.\n", i, entry->buf);
entry++;
}
if (cur_sgl->next)
......@@ -121,20 +121,20 @@ int acc_sgl_virt_to_phys(struct pci_dev *pdev, struct sgl_hw *data,
struct scatterlist *sglist;
if (!data) {
pr_err("[%s] para sgl_s is NULL.\n", __func__);
pr_err("[%s] Para sgl_s is NULL.\n", __func__);
return -EINVAL;
}
if (unlikely(!data->entry_sum_in_sgl) ||
data->entry_sum_in_sgl > data->entry_num_in_sgl) {
pr_err("[%s] para sge num is wrong.\n", __func__);
pr_err("[%s] Para sge num is wrong.\n", __func__);
return -EINVAL;
}
addr_cnt = sgl_addr_cnt(data);
sglist = kcalloc(addr_cnt, sizeof(*sglist), GFP_KERNEL);
if (unlikely(!sglist)) {
pr_err("[%s] malloc sglist fail.\n", __func__);
pr_err("[%s] Malloc sglist fail.\n", __func__);
return -ENOMEM;
}
......@@ -162,7 +162,7 @@ int acc_sgl_phys_to_virt(struct pci_dev *pdev, void *sglist_head,
int ret = -EFAULT;
if (!sglist_head) {
pr_err("[%s] para sglist_head is NULL.\n", __func__);
pr_err("[%s] Para sglist_head is NULL.\n", __func__);
return -EINVAL;
}
......@@ -177,7 +177,7 @@ int acc_sgl_phys_to_virt(struct pci_dev *pdev, void *sglist_head,
entry->buf); i++) {
sg = sg_next(sg);
if (unlikely(!sg)) {
pr_err("[%s][%d]scatterlist happens to be NULL.\n",
pr_err("[%s][%d]Scatterlist happens to be NULL.\n",
__func__, __LINE__);
goto FAIL;
}
......@@ -190,7 +190,7 @@ int acc_sgl_phys_to_virt(struct pci_dev *pdev, void *sglist_head,
if (cur_sgl->next) {
sg = sg_next(sg);
if (unlikely(!sg)) {
pr_err("[%s][%d]scatterlist happens to be NULL.\n",
pr_err("[%s][%d]Scatterlist happens to be NULL.\n",
__func__, __LINE__);
goto FAIL;
}
......
drivers/crypto/hisilicon/rde/rde_main.c
浏览文件 @ 4946aa9f
......@@ -108,30 +108,25 @@ struct hisi_rde_resource {
struct list_head list;
};
struct hisi_rde_hw_error {
u32 int_msk;
const char *msg;
};
static const struct hisi_rde_hw_error rde_hw_error[] = {
{.int_msk = BIT(0), .msg = "rde_ecc_1bitt_err"},
{.int_msk = BIT(1), .msg = "rde_ecc_2bit_err"},
{.int_msk = BIT(2), .msg = "rde_stat_mgmt_state_timeout_err"},
{.int_msk = BIT(3), .msg = "rde_data_wr_state_timeout_err"},
{.int_msk = BIT(4), .msg = "rde_alg_state_timeout_err"},
{.int_msk = BIT(5), .msg = "rde_data_ar_state_timeout_err"},
{.int_msk = BIT(6), .msg = "rde_bd_mgmt_state_timeout_err"},
{.int_msk = BIT(7), .msg = "rde_list_parse_ar_state_timeout_err"},
{.int_msk = BIT(8), .msg = "rde_bd_prefetch_state_timeout_err"},
{.int_msk = BIT(9), .msg = "rde_dst_buf_parse_state_timeout_err"},
{.int_msk = BIT(10), .msg = "rde_src_buf_parse_state_timeout_err"},
{.int_msk = BIT(11), .msg = "rde_chn_timeout_err"},
{.int_msk = BIT(12), .msg = "rde_bd_bresp_err"},
{.int_msk = BIT(13), .msg = "rde_data_bresp_err"},
{.int_msk = BIT(14), .msg = "rde_data_rresp_err"},
{.int_msk = BIT(15), .msg = "rde_sgl_rresp_err"},
{.int_msk = BIT(16), .msg = "rde_list_rresp_err"},
{.int_msk = BIT(17), .msg = "rde_bd_rresp_err"},
{.int_msk = BIT(0), .msg = "Rde_ecc_1bitt_err"},
{.int_msk = BIT(1), .msg = "Rde_ecc_2bit_err"},
{.int_msk = BIT(2), .msg = "Rde_stat_mgmt_state_timeout_err"},
{.int_msk = BIT(3), .msg = "Rde_data_wr_state_timeout_err"},
{.int_msk = BIT(4), .msg = "Rde_alg_state_timeout_err"},
{.int_msk = BIT(5), .msg = "Rde_data_ar_state_timeout_err"},
{.int_msk = BIT(6), .msg = "Rde_bd_mgmt_state_timeout_err"},
{.int_msk = BIT(7), .msg = "Rde_list_parse_ar_state_timeout_err"},
{.int_msk = BIT(8), .msg = "Rde_bd_prefetch_state_timeout_err"},
{.int_msk = BIT(9), .msg = "Rde_dst_buf_parse_state_timeout_err"},
{.int_msk = BIT(10), .msg = "Rde_src_buf_parse_state_timeout_err"},
{.int_msk = BIT(11), .msg = "Rde_chn_timeout_err"},
{.int_msk = BIT(12), .msg = "Rde_bd_bresp_err"},
{.int_msk = BIT(13), .msg = "Rde_data_bresp_err"},
{.int_msk = BIT(14), .msg = "Rde_data_rresp_err"},
{.int_msk = BIT(15), .msg = "Rde_sgl_rresp_err"},
{.int_msk = BIT(16), .msg = "Rde_list_rresp_err"},
{.int_msk = BIT(17), .msg = "Rde_bd_rresp_err"},
{ /* sentinel */ }
};
......@@ -217,7 +212,7 @@ static int pf_q_num_set(const char *val, const struct kernel_param *kp)
if (unlikely(!pdev)) {
q_num = min_t(u32, HRDE_QUEUE_NUM_V1, HRDE_QUEUE_NUM_V2);
pr_info
("No device found currently, suppose queue number is %d\n",
("No device found currently, suppose queue number is %d.\n",
q_num);
} else {
rev_id = pdev->revision;
......@@ -378,7 +373,7 @@ static int current_qm_write(struct ctrl_debug_file *file, u32 val)
u32 tmp;
if (val > 0) {
pr_err("function id should be smaller than 0.\n");
pr_err("Function id should be smaller than 0.\n");
return -EINVAL;
}
......@@ -409,7 +404,7 @@ static int current_bd_write(struct ctrl_debug_file *file, u32 val)
u32 tmp = 0;
if (val >= (HRDE_SQE_SIZE / sizeof(u32))) {
pr_err("width index should be smaller than 16.\n");
pr_err("Width index should be smaller than 16.\n");
return -EINVAL;
}
......@@ -640,6 +635,9 @@ static void hisi_rde_set_user_domain_and_cache(struct hisi_rde *hisi_rde)
/* qm cache */
writel(AXI_M_CFG, hisi_rde->qm.io_base + QM_AXI_M_CFG);
writel(AXI_M_CFG_ENABLE, hisi_rde->qm.io_base + QM_AXI_M_CFG_ENABLE);
/* disable BME/PM/SRIOV FLR*/
writel(PEH_AXUSER_CFG, hisi_rde->qm.io_base + QM_PEH_AXUSER_CFG);
writel(PEH_AXUSER_CFG_ENABLE, hisi_rde->qm.io_base +
QM_PEH_AXUSER_CFG_ENABLE);
......@@ -727,7 +725,7 @@ static int hisi_rde_qm_pre_init(struct hisi_qm *qm, struct pci_dev *pdev)
qm->sqe_size = HRDE_SQE_SIZE;
qm->dev_name = hisi_rde_name;
qm->fun_type = QM_HW_PF;
qm->algs = "rde\n";
qm->algs = "ec\n";
switch (uacce_mode) {
case UACCE_MODE_NOUACCE:
......@@ -791,31 +789,31 @@ static int hisi_rde_probe(struct pci_dev *pdev, const struct pci_device_id *id)
qm = &hisi_rde->qm;
ret = hisi_rde_qm_pre_init(qm, pdev);
if (ret) {
dev_err(&pdev->dev, "Failed to pre init qm!\n");
dev_err(&pdev->dev, "Pre init qm failed!\n");
return ret;
}
ret = hisi_qm_init(qm);
if (ret) {
dev_err(&pdev->dev, "Failed to init qm!\n");
dev_err(&pdev->dev, "Init qm failed!\n");
return ret;
}
ret = hisi_rde_pf_probe_init(hisi_rde);
if (ret) {
dev_err(&pdev->dev, "Failed to init pf!\n");
dev_err(&pdev->dev, "Init pf failed!\n");
goto err_qm_uninit;
}
ret = hisi_qm_start(qm);
if (ret) {
dev_err(&pdev->dev, "Failed to start qm!\n");
dev_err(&pdev->dev, "Start qm failed!\n");
goto err_qm_uninit;
}
ret = hisi_rde_debugfs_init(hisi_rde);
if (ret)
dev_warn(&pdev->dev, "Failed to init debugfs!\n");
dev_warn(&pdev->dev, "Init debugfs failed!\n");
hisi_rde_add_to_list(hisi_rde);
hisi_rde->rde_list_lock = &hisi_rde_list_lock;
......@@ -851,25 +849,29 @@ static void hisi_rde_hw_error_log(struct hisi_rde *hisi_rde, u32 err_sts)
while (err->msg) {
if (err->int_msk & err_sts)
dev_err(dev, "%s [error status=0x%x] found\n",
err->msg, err->int_msk);
dev_err_ratelimited(dev,
"[%s] [Error status=0x%x] found.\n",
err->msg, err->int_msk);
err++;
}
if (HRDE_ECC_2BIT_ERR & err_sts) {
err_val = (readl(hisi_rde->qm.io_base + HRDE_ERR_CNT)
& HRDE_ECC_2BIT_CNT_MSK);
dev_err(dev, "rde ecc 2bit sram num=0x%x\n", err_val);
dev_err_ratelimited(dev,
"Rde ecc 2bit sram num=0x%x.\n", err_val);
}
if (HRDE_STATE_INT_ERR & err_sts) {
for (i = 0; i < HRDE_DFX_NUM; i++) {
dev_err(dev, "%s=0x%x\n", hrde_dfx_regs[i].name,
dev_err_ratelimited(dev, "%s=0x%x\n",
hrde_dfx_regs[i].name,
readl(hisi_rde->qm.io_base +
hrde_dfx_regs[i].offset));
}
for (i = 0; i < HRDE_OOO_DFX_NUM; i++) {
dev_err(dev, "%s=0x%x\n", hrde_ooo_dfx_regs[i].name,
dev_err_ratelimited(dev, "%s=0x%x\n",
hrde_ooo_dfx_regs[i].name,
readl(hisi_rde->qm.io_base +
hrde_ooo_dfx_regs[i].offset));
}
......@@ -900,7 +902,7 @@ static pci_ers_result_t hisi_rde_hw_error_process(struct pci_dev *pdev)
pci_ers_result_t qm_ret, rde_ret, ret;
if (!hisi_rde) {
dev_err(dev, "Can't recover rde-error at dev init\n");
dev_err(dev, "Can't recover rde-error at dev init.\n");
return PCI_ERS_RESULT_NONE;
}
......@@ -943,7 +945,7 @@ static int hisi_rde_controller_reset_prepare(struct hisi_rde *hisi_rde)
ret = hisi_qm_stop(qm, QM_SOFT_RESET);
if (ret) {
dev_err(&pdev->dev, "Fails to stop QM!\n");
dev_err(&pdev->dev, "Stop QM failed!\n");
return ret;
}
......@@ -951,7 +953,7 @@ static int hisi_rde_controller_reset_prepare(struct hisi_rde *hisi_rde)
if (qm->use_uacce) {
ret = uacce_hw_err_isolate(&qm->uacce);
if (ret) {
dev_err(&pdev->dev, "Fails to isolate hw err!\n");
dev_err(&pdev->dev, "Isolate hw err failed!\n");
return ret;
}
}
......@@ -976,7 +978,7 @@ static int hisi_rde_soft_reset(struct hisi_rde *hisi_rde)
/* Disable PEH MSI */
ret = hisi_qm_set_msi(qm, HRDE_DISABLE);
if (ret) {
dev_err(dev, "Fails to disable peh msi bit.\n");
dev_err(dev, "Disable peh msi bit failed.\n");
return ret;
}
......@@ -997,7 +999,7 @@ static int hisi_rde_soft_reset(struct hisi_rde *hisi_rde)
/* Disable PF MSE bit */
ret = hisi_qm_set_pf_mse(qm, HRDE_DISABLE);
if (ret) {
dev_err(dev, "Fails to disable pf mse bit.\n");
dev_err(dev, "Disable pf mse bit failed.\n");
return ret;
}
......@@ -1033,14 +1035,14 @@ static int hisi_rde_controller_reset_done(struct hisi_rde *hisi_rde)
/* Enable PEH MSI */
ret = hisi_qm_set_msi(qm, HRDE_ENABLE);
if (ret) {
dev_err(&pdev->dev, "Fails to enable peh msi bit!\n");
dev_err(&pdev->dev, "Enable peh msi bit failed!\n");
return ret;
}
/* Enable PF MSE bit */
ret = hisi_qm_set_pf_mse(qm, HRDE_ENABLE);
if (ret) {
dev_err(&pdev->dev, "Fails to enable pf mse bit!\n");
dev_err(&pdev->dev, "Enable pf mse bit failed!\n");
return ret;
}
......@@ -1049,7 +1051,7 @@ static int hisi_rde_controller_reset_done(struct hisi_rde *hisi_rde)
ret = hisi_qm_restart(qm);
if (ret) {
dev_err(&pdev->dev, "Failed to start QM!\n");
dev_err(&pdev->dev, "Start QM failed!\n");
return -EPERM;
}
......@@ -1061,7 +1063,7 @@ static int hisi_rde_controller_reset(struct hisi_rde *hisi_rde)
struct device *dev = &hisi_rde->qm.pdev->dev;
int ret;
dev_info(dev, "Controller resetting...\n");
dev_info_ratelimited(dev, "Controller resetting...\n");
ret = hisi_rde_controller_reset_prepare(hisi_rde);
if (ret)
......@@ -1069,7 +1071,7 @@ static int hisi_rde_controller_reset(struct hisi_rde *hisi_rde)
ret = hisi_rde_soft_reset(hisi_rde);
if (ret) {
dev_err(dev, "Controller reset failed (%d)\n", ret);
dev_err(dev, "Controller reset failed (%d).\n", ret);
return ret;
}
......@@ -1078,7 +1080,7 @@ static int hisi_rde_controller_reset(struct hisi_rde *hisi_rde)
return ret;
clear_bit(HISI_RDE_RESET, &hisi_rde->status);
dev_info(dev, "Controller reset complete\n");
dev_info_ratelimited(dev, "Controller reset complete.\n");
return 0;
}
......@@ -1097,7 +1099,7 @@ static void hisi_rde_ras_proc(struct work_struct *work)
ret = hisi_rde_hw_error_process(pdev);
if (ret == PCI_ERS_RESULT_NEED_RESET)
if (hisi_rde_controller_reset(hisi_rde))
dev_err(&pdev->dev, "hisi_rde reset fail.\n");
dev_err(&pdev->dev, "Hisi_rde reset fail.\n");
}
......@@ -1115,7 +1117,7 @@ int hisi_rde_abnormal_fix(struct hisi_qm *qm)
hisi_rde = pci_get_drvdata(pdev);
if (!hisi_rde) {
dev_err(&pdev->dev, "hisi_rde is NULL.\n");
dev_err(&pdev->dev, "Hisi_rde is NULL.\n");
return -EINVAL;
}
......@@ -1168,7 +1170,7 @@ static void hisi_rde_reset_prepare(struct pci_dev *pdev)
ret = hisi_qm_stop(qm, QM_FLR);
if (ret) {
dev_err(&pdev->dev, "Fails to stop QM!\n");
dev_err(&pdev->dev, "Stop QM failed!\n");
return;
}
......@@ -1197,7 +1199,7 @@ static void hisi_rde_reset_done(struct pci_dev *pdev)
ret = hisi_qm_restart(qm);
if (ret) {
dev_err(&pdev->dev, "Failed to start QM!\n");
dev_err(&pdev->dev, "Start QM failed!\n");
goto flr_done;
}
......@@ -1244,12 +1246,12 @@ static int __init hisi_rde_init(void)
ret = pci_register_driver(&hisi_rde_pci_driver);
if (ret < 0) {
pr_err("Failed to register pci driver.\n");
pr_err("Register pci driver failed.\n");
goto err_pci;
}
if (list_empty(&hisi_rde_list)) {
pr_err("no rde device.\n");
pr_err("No rde device.\n");
ret = -ENODEV;
goto err_probe_device;
}
......
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