提交 40f53603 编写于 作者: Y Yixian Liu 提交者: Xie XiuQi

RDMA/hns: Remove unnessary init for cmq reg

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

There is no need to init the enable bit of cmq.
Signed-off-by: NYixian Liu <liuyixian@huawei.com>
Reviewed-by: Noulijun <oulijun@huawei.com>
Reviewed-by: NXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 2cf8cdea
...@@ -936,8 +936,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) ...@@ -936,8 +936,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type)
roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_H_REG, roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_H_REG,
upper_32_bits(dma)); upper_32_bits(dma));
roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG, roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG,
(ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S) | ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
HNS_ROCE_CMQ_ENABLE);
roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0); roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0);
roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0); roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0);
} else { } else {
...@@ -945,8 +944,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) ...@@ -945,8 +944,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type)
roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG, roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG,
upper_32_bits(dma)); upper_32_bits(dma));
roce_write(hr_dev, ROCEE_RX_CMQ_DEPTH_REG, roce_write(hr_dev, ROCEE_RX_CMQ_DEPTH_REG,
(ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S) | ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
HNS_ROCE_CMQ_ENABLE);
roce_write(hr_dev, ROCEE_RX_CMQ_HEAD_REG, 0); roce_write(hr_dev, ROCEE_RX_CMQ_HEAD_REG, 0);
roce_write(hr_dev, ROCEE_RX_CMQ_TAIL_REG, 0); roce_write(hr_dev, ROCEE_RX_CMQ_TAIL_REG, 0);
} }
......
...@@ -138,8 +138,6 @@ ...@@ -138,8 +138,6 @@
#define HNS_ROCE_CMD_FLAG_ERR_INTR BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT) #define HNS_ROCE_CMD_FLAG_ERR_INTR BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
#define HNS_ROCE_CMQ_DESC_NUM_S 3 #define HNS_ROCE_CMQ_DESC_NUM_S 3
#define HNS_ROCE_CMQ_EN_B 16
#define HNS_ROCE_CMQ_ENABLE BIT(HNS_ROCE_CMQ_EN_B)
#define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT 100 #define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT 100
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册