提交 3d954cf1 编写于 作者: D Dinh Nguyen 提交者: Olof Johansson

ARM: socfpga: dts: Add ethernet bindings for SOCFPGA

Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Olof Johansson <olof@lixom.net>
Cc: Pavel Machek <pavel@denx.de>
CC: <linux@arm.linux.org.uk>

v2:
- Moved "disabled" status to dtsi file
Signed-off-by: NOlof Johansson <olof@lixom.net>
上级 6cd26ece
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
aliases { aliases {
ethernet0 = &gmac0; ethernet0 = &gmac0;
ethernet1 = &gmac1;
serial0 = &uart0; serial0 = &uart0;
serial1 = &uart1; serial1 = &uart1;
timer0 = &timer0; timer0 = &timer0;
...@@ -238,13 +239,26 @@ ...@@ -238,13 +239,26 @@
}; };
}; };
gmac0: stmmac@ff700000 { gmac0: ethernet@ff700000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
reg = <0xff700000 0x2000>; reg = <0xff700000 0x2000>;
interrupts = <0 115 4>; interrupts = <0 115 4>;
interrupt-names = "macirq"; interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
phy-mode = "gmii"; clocks = <&emac0_clk>;
clock-names = "stmmaceth";
status = "disabled";
};
gmac1: ethernet@ff702000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
reg = <0xff702000 0x2000>;
interrupts = <0 120 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
clocks = <&emac1_clk>;
clock-names = "stmmaceth";
status = "disabled";
}; };
L2: l2-cache@fffef000 { L2: l2-cache@fffef000 {
......
...@@ -32,6 +32,13 @@ ...@@ -32,6 +32,13 @@
reg = <0x0 0x40000000>; /* 1GB */ reg = <0x0 0x40000000>; /* 1GB */
}; };
aliases {
/* this allow the ethaddr uboot environmnet variable contents
* to be added to the gmac1 device tree blob.
*/
ethernet0 = &gmac1;
};
soc { soc {
clkmgr@ffd04000 { clkmgr@ffd04000 {
clocks { clocks {
...@@ -41,6 +48,12 @@ ...@@ -41,6 +48,12 @@
}; };
}; };
ethernet@ff702000 {
phy-mode = "rgmii";
phy-addr = <0xffffffff>; /* probe for phy addr */
status = "okay";
};
timer0@ffc08000 { timer0@ffc08000 {
clock-frequency = <100000000>; clock-frequency = <100000000>;
}; };
......
...@@ -41,6 +41,11 @@ ...@@ -41,6 +41,11 @@
}; };
}; };
ethernet@ff700000 {
phy-mode = "gmii";
status = "okay";
};
timer0@ffc08000 { timer0@ffc08000 {
clock-frequency = <7000000>; clock-frequency = <7000000>;
}; };
......
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