提交 3d3231b1 编写于 作者: M Marek Szyprowski 提交者: Kukjin Kim

ARM: EXYNOS: set fix xusbxti clock for NURI and Universal210 boards

On some versions of NURI and UniversalC210 boards, camera clocks are
routed directly to xusbxti clock source. This patch sets the correct
value for this clock to let usb and camera sensors to work correctly and
avoid division by zero on driver's probe.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
上级 f441f8a0
...@@ -1347,6 +1347,7 @@ static struct platform_device *nuri_devices[] __initdata = { ...@@ -1347,6 +1347,7 @@ static struct platform_device *nuri_devices[] __initdata = {
static void __init nuri_map_io(void) static void __init nuri_map_io(void)
{ {
clk_xusbxti.rate = 24000000;
exynos_init_io(NULL, 0); exynos_init_io(NULL, 0);
s3c24xx_init_clocks(24000000); s3c24xx_init_clocks(24000000);
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
...@@ -1379,7 +1380,6 @@ static void __init nuri_machine_init(void) ...@@ -1379,7 +1380,6 @@ static void __init nuri_machine_init(void)
nuri_camera_init(); nuri_camera_init();
nuri_ehci_init(); nuri_ehci_init();
clk_xusbxti.rate = 24000000;
/* Last */ /* Last */
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
......
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
#include <plat/clock.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/devs.h> #include <plat/devs.h>
#include <plat/iic.h> #include <plat/iic.h>
...@@ -1057,6 +1058,7 @@ static struct platform_device *universal_devices[] __initdata = { ...@@ -1057,6 +1058,7 @@ static struct platform_device *universal_devices[] __initdata = {
static void __init universal_map_io(void) static void __init universal_map_io(void)
{ {
clk_xusbxti.rate = 24000000;
exynos_init_io(NULL, 0); exynos_init_io(NULL, 0);
s3c24xx_init_clocks(24000000); s3c24xx_init_clocks(24000000);
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
......
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