提交 3a71c05e 编写于 作者: L Loic Poulain 提交者: Linus Walleij

pinctrl: baytrail: Clear DIRECT_IRQ bit

Direct irq en bit should be cleared for pads using io mode.
If not, the io based irq will never be detected.
However, this bit can sometimes be misconfigured (BIOS issue).
Force clearing of this bit in io mode and trigger a WARN.
Signed-off-by: NLoic Poulain <loic.poulain@intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
上级 f114040e
...@@ -227,10 +227,14 @@ static int byt_irq_type(struct irq_data *d, unsigned type) ...@@ -227,10 +227,14 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
spin_lock_irqsave(&vg->lock, flags); spin_lock_irqsave(&vg->lock, flags);
value = readl(reg); value = readl(reg);
WARN(value & BYT_DIRECT_IRQ_EN,
"Bad pad config for io mode, force direct_irq_en bit clearing");
/* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits /* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits
* are used to indicate high and low level triggering * are used to indicate high and low level triggering
*/ */
value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL); value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG |
BYT_TRIG_LVL);
switch (type) { switch (type) {
case IRQ_TYPE_LEVEL_HIGH: case IRQ_TYPE_LEVEL_HIGH:
......
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