Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
openeuler
raspberrypi-kernel
提交
36f1317e
R
raspberrypi-kernel
项目概览
openeuler
/
raspberrypi-kernel
通知
13
Star
1
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
R
raspberrypi-kernel
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
提交
Issue看板
提交
36f1317e
编写于
10月 27, 2011
作者:
B
Ben Skeggs
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
drm/nv04-nv30/pm: port to newer interfaces
Signed-off-by:
N
Ben Skeggs
<
bskeggs@redhat.com
>
上级
f3fbaf34
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
91 addition
and
49 deletion
+91
-49
drivers/gpu/drm/nouveau/nouveau_pm.h
drivers/gpu/drm/nouveau/nouveau_pm.h
+3
-4
drivers/gpu/drm/nouveau/nouveau_state.c
drivers/gpu/drm/nouveau/nouveau_state.c
+12
-12
drivers/gpu/drm/nouveau/nv04_pm.c
drivers/gpu/drm/nouveau/nv04_pm.c
+76
-33
未找到文件。
drivers/gpu/drm/nouveau/nouveau_pm.h
浏览文件 @
36f1317e
...
...
@@ -47,10 +47,9 @@ void nouveau_mem_timing_init(struct drm_device *);
void
nouveau_mem_timing_fini
(
struct
drm_device
*
);
/* nv04_pm.c */
int
nv04_pm_clock_get
(
struct
drm_device
*
,
u32
id
);
void
*
nv04_pm_clock_pre
(
struct
drm_device
*
,
struct
nouveau_pm_level
*
,
u32
id
,
int
khz
);
void
nv04_pm_clock_set
(
struct
drm_device
*
,
void
*
);
int
nv04_pm_clocks_get
(
struct
drm_device
*
,
struct
nouveau_pm_level
*
);
void
*
nv04_pm_clocks_pre
(
struct
drm_device
*
,
struct
nouveau_pm_level
*
);
int
nv04_pm_clocks_set
(
struct
drm_device
*
,
void
*
);
/* nv40_pm.c */
int
nv40_pm_clocks_get
(
struct
drm_device
*
,
struct
nouveau_pm_level
*
);
...
...
drivers/gpu/drm/nouveau/nouveau_state.c
浏览文件 @
36f1317e
...
...
@@ -87,9 +87,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine
->
gpio
.
get
=
NULL
;
engine
->
gpio
.
set
=
NULL
;
engine
->
gpio
.
irq_enable
=
NULL
;
engine
->
pm
.
clock
_get
=
nv04_pm_clock
_get
;
engine
->
pm
.
clock
_pre
=
nv04_pm_clock
_pre
;
engine
->
pm
.
clock
_set
=
nv04_pm_clock
_set
;
engine
->
pm
.
clock
s_get
=
nv04_pm_clocks
_get
;
engine
->
pm
.
clock
s_pre
=
nv04_pm_clocks
_pre
;
engine
->
pm
.
clock
s_set
=
nv04_pm_clocks
_set
;
engine
->
vram
.
init
=
nouveau_mem_detect
;
engine
->
vram
.
takedown
=
nouveau_stub_takedown
;
engine
->
vram
.
flags_valid
=
nouveau_mem_flags_valid
;
...
...
@@ -136,9 +136,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine
->
gpio
.
get
=
nv10_gpio_get
;
engine
->
gpio
.
set
=
nv10_gpio_set
;
engine
->
gpio
.
irq_enable
=
NULL
;
engine
->
pm
.
clock
_get
=
nv04_pm_clock
_get
;
engine
->
pm
.
clock
_pre
=
nv04_pm_clock
_pre
;
engine
->
pm
.
clock
_set
=
nv04_pm_clock
_set
;
engine
->
pm
.
clock
s_get
=
nv04_pm_clocks
_get
;
engine
->
pm
.
clock
s_pre
=
nv04_pm_clocks
_pre
;
engine
->
pm
.
clock
s_set
=
nv04_pm_clocks
_set
;
engine
->
vram
.
init
=
nouveau_mem_detect
;
engine
->
vram
.
takedown
=
nouveau_stub_takedown
;
engine
->
vram
.
flags_valid
=
nouveau_mem_flags_valid
;
...
...
@@ -185,9 +185,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine
->
gpio
.
get
=
nv10_gpio_get
;
engine
->
gpio
.
set
=
nv10_gpio_set
;
engine
->
gpio
.
irq_enable
=
NULL
;
engine
->
pm
.
clock
_get
=
nv04_pm_clock
_get
;
engine
->
pm
.
clock
_pre
=
nv04_pm_clock
_pre
;
engine
->
pm
.
clock
_set
=
nv04_pm_clock
_set
;
engine
->
pm
.
clock
s_get
=
nv04_pm_clocks
_get
;
engine
->
pm
.
clock
s_pre
=
nv04_pm_clocks
_pre
;
engine
->
pm
.
clock
s_set
=
nv04_pm_clocks
_set
;
engine
->
vram
.
init
=
nouveau_mem_detect
;
engine
->
vram
.
takedown
=
nouveau_stub_takedown
;
engine
->
vram
.
flags_valid
=
nouveau_mem_flags_valid
;
...
...
@@ -234,9 +234,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine
->
gpio
.
get
=
nv10_gpio_get
;
engine
->
gpio
.
set
=
nv10_gpio_set
;
engine
->
gpio
.
irq_enable
=
NULL
;
engine
->
pm
.
clock
_get
=
nv04_pm_clock
_get
;
engine
->
pm
.
clock
_pre
=
nv04_pm_clock
_pre
;
engine
->
pm
.
clock
_set
=
nv04_pm_clock
_set
;
engine
->
pm
.
clock
s_get
=
nv04_pm_clocks
_get
;
engine
->
pm
.
clock
s_pre
=
nv04_pm_clocks
_pre
;
engine
->
pm
.
clock
s_set
=
nv04_pm_clocks
_set
;
engine
->
pm
.
voltage_get
=
nouveau_voltage_gpio_get
;
engine
->
pm
.
voltage_set
=
nouveau_voltage_gpio_set
;
engine
->
vram
.
init
=
nouveau_mem_detect
;
...
...
drivers/gpu/drm/nouveau/nv04_pm.c
浏览文件 @
36f1317e
...
...
@@ -27,68 +27,111 @@
#include "nouveau_hw.h"
#include "nouveau_pm.h"
struct
nv04_pm_state
{
int
nv04_pm_clocks_get
(
struct
drm_device
*
dev
,
struct
nouveau_pm_level
*
perflvl
)
{
int
ret
;
ret
=
nouveau_hw_get_clock
(
dev
,
PLL_CORE
);
if
(
ret
<
0
)
return
ret
;
perflvl
->
core
=
ret
;
ret
=
nouveau_hw_get_clock
(
dev
,
PLL_MEMORY
);
if
(
ret
<
0
)
return
ret
;
perflvl
->
memory
=
ret
;
return
0
;
}
struct
nv04_pm_clock
{
struct
pll_lims
pll
;
struct
nouveau_pll_vals
calc
;
};
int
nv04_pm_clock_get
(
struct
drm_device
*
dev
,
u32
id
)
struct
nv04_pm_state
{
struct
nv04_pm_clock
core
;
struct
nv04_pm_clock
memory
;
};
static
int
calc_pll
(
struct
drm_device
*
dev
,
u32
id
,
int
khz
,
struct
nv04_pm_clock
*
clk
)
{
return
nouveau_hw_get_clock
(
dev
,
id
);
int
ret
;
ret
=
get_pll_limits
(
dev
,
id
,
&
clk
->
pll
);
if
(
ret
)
return
ret
;
ret
=
nouveau_calc_pll_mnp
(
dev
,
&
clk
->
pll
,
khz
,
&
clk
->
calc
);
if
(
!
ret
)
return
-
EINVAL
;
return
0
;
}
void
*
nv04_pm_clock_pre
(
struct
drm_device
*
dev
,
struct
nouveau_pm_level
*
perflvl
,
u32
id
,
int
khz
)
nv04_pm_clocks_pre
(
struct
drm_device
*
dev
,
struct
nouveau_pm_level
*
perflvl
)
{
struct
nv04_pm_state
*
state
;
struct
nv04_pm_state
*
info
;
int
ret
;
state
=
kzalloc
(
sizeof
(
*
state
),
GFP_KERNEL
);
if
(
!
state
)
info
=
kzalloc
(
sizeof
(
*
info
),
GFP_KERNEL
);
if
(
!
info
)
return
ERR_PTR
(
-
ENOMEM
);
ret
=
get_pll_limits
(
dev
,
id
,
&
state
->
pll
);
if
(
ret
)
{
kfree
(
state
);
return
(
ret
==
-
ENOENT
)
?
NULL
:
ERR_PTR
(
ret
);
}
ret
=
calc_pll
(
dev
,
PLL_CORE
,
perflvl
->
core
,
&
info
->
core
);
if
(
ret
)
goto
error
;
ret
=
nouveau_calc_pll_mnp
(
dev
,
&
state
->
pll
,
khz
,
&
state
->
calc
);
if
(
!
ret
)
{
kfree
(
state
);
return
ERR_PTR
(
-
EINVAL
)
;
if
(
perflvl
->
memory
)
{
ret
=
calc_pll
(
dev
,
PLL_MEMORY
,
perflvl
->
memory
,
&
info
->
memory
);
if
(
ret
)
goto
error
;
}
return
state
;
return
info
;
error:
kfree
(
info
);
return
ERR_PTR
(
ret
);
}
void
nv04_pm_clock_set
(
struct
drm_device
*
dev
,
void
*
pre_state
)
static
void
prog_pll
(
struct
drm_device
*
dev
,
struct
nv04_pm_clock
*
clk
)
{
struct
drm_nouveau_private
*
dev_priv
=
dev
->
dev_private
;
struct
nouveau_timer_engine
*
ptimer
=
&
dev_priv
->
engine
.
timer
;
struct
nv04_pm_state
*
state
=
pre_state
;
u32
reg
=
state
->
pll
.
reg
;
u32
reg
=
clk
->
pll
.
reg
;
/* thank the insane nouveau_hw_setpll() interface for this */
if
(
dev_priv
->
card_type
>=
NV_40
)
reg
+=
4
;
nouveau_hw_setpll
(
dev
,
reg
,
&
state
->
calc
);
nouveau_hw_setpll
(
dev
,
reg
,
&
clk
->
calc
);
}
int
nv04_pm_clocks_set
(
struct
drm_device
*
dev
,
void
*
pre_state
)
{
struct
drm_nouveau_private
*
dev_priv
=
dev
->
dev_private
;
struct
nouveau_timer_engine
*
ptimer
=
&
dev_priv
->
engine
.
timer
;
struct
nv04_pm_state
*
state
=
pre_state
;
prog_pll
(
dev
,
&
state
->
core
);
if
(
dev_priv
->
card_type
<
NV_30
&&
reg
==
NV_PRAMDAC_MPLL_COEFF
)
{
if
(
dev_priv
->
card_type
==
NV_20
)
nv_mask
(
dev
,
0x1002c4
,
0
,
1
<<
20
);
if
(
state
->
memory
.
pll
.
reg
)
{
prog_pll
(
dev
,
&
state
->
memory
);
if
(
dev_priv
->
card_type
<
NV_30
)
{
if
(
dev_priv
->
card_type
==
NV_20
)
nv_mask
(
dev
,
0x1002c4
,
0
,
1
<<
20
);
/* Reset the DLLs */
nv_mask
(
dev
,
0x1002c0
,
0
,
1
<<
8
);
/* Reset the DLLs */
nv_mask
(
dev
,
0x1002c0
,
0
,
1
<<
8
);
}
}
if
(
reg
==
NV_PRAMDAC_NVPLL_COEFF
)
ptimer
->
init
(
dev
);
ptimer
->
init
(
dev
);
kfree
(
state
);
return
0
;
}
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录