提交 32bf7106 编写于 作者: K Ken Wang 提交者: Alex Deucher

drm/amdgpu add max_memory_clock for interface query (v2)

Add a query for the max memory clock.

v2: handle the dpm enabled case properly
Signed-off-by: NKen Wang <Qingqing.Wang@amd.com>
Reviewd-by: NJammy Zhou <Jammy.Zhou@amd.com>
上级 35074d2d
......@@ -414,11 +414,15 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
/* return all clocks in KHz */
dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
if (adev->pm.dpm_enabled)
if (adev->pm.dpm_enabled) {
dev_info.max_engine_clock =
adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;
else
dev_info.max_memory_clock =
adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10;
} else {
dev_info.max_engine_clock = adev->pm.default_sclk * 10;
dev_info.max_memory_clock = adev->pm.default_mclk * 10;
}
dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;
dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *
adev->gfx.config.max_shader_engines;
......
......@@ -553,6 +553,7 @@ struct drm_amdgpu_info_device {
uint32_t num_shader_arrays_per_engine;
uint32_t gpu_counter_freq; /* in KHz */
uint64_t max_engine_clock; /* in KHz */
uint64_t max_memory_clock; /* in KHz */
/* cu information */
uint32_t cu_active_number;
uint32_t cu_ao_mask;
......
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