hwmon: (coretemp) fix reading of microcode revision (v2)
According to the documentation, simply reading the respective MSR isn't sufficient: It should be written with zeros, cpuid(1) be executed, and then read (see arch/x86/kernel/cpu/intel.c for an example). v2: Fail probe when microcode revision cannot be determined, but is needed to check for proper operation. Signed-off-by: NJan Beulich <jbeulich@novell.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Chen Gong <gong.chen@linux.intel.com> Cc: Jean Delvare <khali@linux-fr.org> Acked-by: NFenghua Yu <fenghua.yu@intel.com> Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
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