提交 2b7ef094 编写于 作者: G Grygorii Strashko 提交者: Santosh Shilimkar

ARM: dts: keystone: fix netcp's clocks definitions

The clocks tree for Keystone 2 NTCP devices should be
defined as following:
[refclk] - board dependent
 |- <papllclk> - PLL clock
    |- <paclk13> - fixed factor clock div=3 mul=1
       |- <clkpa> - gated clock
       |- <clkcpgmac> - gated clock
       |- <clksa> - gated clock

Hence, update Keystone 2 DT to follow HW specification.
Signed-off-by: NWingMan Kwok <w-kwok2@ti.com>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
上级 7171511e
......@@ -22,7 +22,7 @@ clocks {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkpass>;
clock-output-names = "pa-pll-clk";
clock-output-names = "papllclk";
reg = <0x02620358 4>;
reg-names = "control";
};
......
......@@ -31,7 +31,7 @@ clocks {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkpass>;
clock-output-names = "pa-pll-clk";
clock-output-names = "papllclk";
reg = <0x02620358 4>;
reg-names = "control";
};
......
......@@ -31,7 +31,7 @@ clocks {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclksys>;
clock-output-names = "pa-pll-clk";
clock-output-names = "papllclk";
reg = <0x02620358 4>;
reg-names = "control";
};
......
......@@ -215,7 +215,7 @@ clocks {
clkpa: clkpa {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
clocks = <&paclk13>;
clock-output-names = "pa";
reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
reg-names = "control", "domain";
......
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