提交 21b5b8ee 编写于 作者: A Ananth Jasty 提交者: Herbert Xu

PCI: quirk fixup for cavium invalid sriov link value.

Cavium cn88xx hardware presents an incorrect SR-IOV Function
Dependency Link, add a fixup quirk for the affected devices.
Acked-by: NDavid Daney <david.daney@cavium.com>
Signed-off-by: NAnanth Jasty <Ananth.Jasty@cavium.com>
Signed-off-by: NOmer Khaliq <okhaliq@caviumnetworks.com>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
上级 16d56963
...@@ -834,6 +834,17 @@ static void quirk_amd_ioapic(struct pci_dev *dev) ...@@ -834,6 +834,17 @@ static void quirk_amd_ioapic(struct pci_dev *dev)
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic);
#endif /* CONFIG_X86_IO_APIC */ #endif /* CONFIG_X86_IO_APIC */
#ifdef CONFIG_ARM64
static void quirk_cavium_sriov_rnm_link(struct pci_dev *dev)
{
/* Fix for improper SRIOV configuration on Cavium cn88xx RNM device */
if (dev->subsystem_device == 0xa118)
dev->sriov->link = dev->devfn;
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa018, quirk_cavium_sriov_rnm_link);
#endif
/* /*
* Some settings of MMRBC can lead to data corruption so block changes. * Some settings of MMRBC can lead to data corruption so block changes.
* See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册