DMAENGINE: ste_dma40: interrupts only on dst
We don't want interrupts when the source is done, only when the destination is done and everything is complete at the recieveing end of a transfer. Signed-off-by: NJonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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