提交 172289df 编写于 作者: C Chris Blair 提交者: Linus Walleij

spi/pl022: only enable RX interrupts when TX is complete

For interrupt mode transfers, start with only TX interrupts enabled
to reduce the overall number of interrupts received. Once TX is
complete, enable RX interrupts to complete the transfer.
Reviewed-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NChris Blair <chris.blair@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
上级 caca6a03
......@@ -1244,9 +1244,9 @@ static irqreturn_t pl022_interrupt_handler(int irq, void *dev_id)
if ((pl022->tx == pl022->tx_end) && (flag == 0)) {
flag = 1;
/* Disable Transmit interrupt */
writew(readw(SSP_IMSC(pl022->virtbase)) &
(~SSP_IMSC_MASK_TXIM),
/* Disable Transmit interrupt, enable receive interrupt */
writew((readw(SSP_IMSC(pl022->virtbase)) &
~SSP_IMSC_MASK_TXIM) | SSP_IMSC_MASK_RXIM,
SSP_IMSC(pl022->virtbase));
}
......@@ -1379,12 +1379,17 @@ static void pump_transfers(unsigned long data)
}
err_config_dma:
writew(ENABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase));
/* enable all interrupts except RX */
writew(ENABLE_ALL_INTERRUPTS & ~SSP_IMSC_MASK_RXIM, SSP_IMSC(pl022->virtbase));
}
static void do_interrupt_dma_transfer(struct pl022 *pl022)
{
u32 irqflags = ENABLE_ALL_INTERRUPTS;
/*
* Default is to enable all interrupts except RX -
* this will be enabled once TX is complete
*/
u32 irqflags = ENABLE_ALL_INTERRUPTS & ~SSP_IMSC_MASK_RXIM;
/* Enable target chip */
pl022->cur_chip->cs_control(SSP_CHIP_SELECT);
......
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