提交 12f1ba5a 编写于 作者: L Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
  x86/PCI/ACPI: fix type mismatch
  PCI: fix new kernel-doc warning
  PCI: Fix warning in drivers/pci/probe.c on sparc64
...@@ -188,7 +188,7 @@ static bool resource_contains(struct resource *res, resource_size_t point) ...@@ -188,7 +188,7 @@ static bool resource_contains(struct resource *res, resource_size_t point)
return false; return false;
} }
static void coalesce_windows(struct pci_root_info *info, int type) static void coalesce_windows(struct pci_root_info *info, unsigned long type)
{ {
int i, j; int i, j;
struct resource *res1, *res2; struct resource *res1, *res2;
......
...@@ -3284,7 +3284,7 @@ static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode, ...@@ -3284,7 +3284,7 @@ static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
* @dev: the PCI device * @dev: the PCI device
* @decode: true = enable decoding, false = disable decoding * @decode: true = enable decoding, false = disable decoding
* @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY * @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
* @change_bridge_flags: traverse ancestors and change bridges * @flags: traverse ancestors and change bridges
* CHANGE_BRIDGE_ONLY / CHANGE_BRIDGE * CHANGE_BRIDGE_ONLY / CHANGE_BRIDGE
*/ */
int pci_set_vga_state(struct pci_dev *dev, bool decode, int pci_set_vga_state(struct pci_dev *dev, bool decode,
......
...@@ -168,7 +168,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, ...@@ -168,7 +168,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN; res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
if (type == pci_bar_io) { if (type == pci_bar_io) {
l &= PCI_BASE_ADDRESS_IO_MASK; l &= PCI_BASE_ADDRESS_IO_MASK;
mask = PCI_BASE_ADDRESS_IO_MASK & IO_SPACE_LIMIT; mask = PCI_BASE_ADDRESS_IO_MASK & (u32) IO_SPACE_LIMIT;
} else { } else {
l &= PCI_BASE_ADDRESS_MEM_MASK; l &= PCI_BASE_ADDRESS_MEM_MASK;
mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
......
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